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	Break the instruction processing if there are impossible combinations of Sx flags and operand sizes. If the intent is to always require explicit sizes, use the SX flag. The INSERTPS instruction pattern was explicitly wrong, the rest of these are nuisance fixes. TODO: fix the disassembler to be able to exclude patterns where these bits don't matter. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
		
			
				
	
	
		
			37 lines
		
	
	
		
			556 B
		
	
	
	
		
			NASM
		
	
	
	
	
	
			
		
		
	
	
			37 lines
		
	
	
		
			556 B
		
	
	
	
		
			NASM
		
	
	
	
	
	
| 	bits 64
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| 
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| %macro b 1
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| 	%1 ax,16
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| 	%1 eax,16
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| 	%1 rax,16
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| 	%1 word [rdi],16
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| 	%1 dword [rdi],16
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| 	%1 qword [rdi],16
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| 	%1 ax,byte 16
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| 	%1 eax,byte 16
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| 	%1 rax,byte 16
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| 	%1 word [rdi],byte 16
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| 	%1 dword [rdi],byte 16
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| 	%1 qword [rdi],byte 16
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| %endmacro
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| 
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| 	b bt
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| 	b btc
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| 	b btr
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| 	b bts
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| 
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| 	imul ax,[rdi],16
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| 	imul ax,word [rdi],16
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| 	imul ax,[rdi],byte 16
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| 	imul ax,word [rdi],byte 16
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| 
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| 	imul eax,[rdi],16
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| 	imul eax,dword [rdi],16
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| 	imul eax,[rdi],byte 16
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| 	imul eax,dword [rdi],byte 16
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| 
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| 	imul rax,[rdi],16
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| 	imul rax,qword [rdi],16
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| 	imul rax,[rdi],byte 16
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| 	imul rax,qword [rdi],byte 16
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