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e20ca02cfb
There are two instructions (VGATHERQPS, VPGATHERQD) where the only separation between two forms is the vector length given to the vector SIB. This means the *matcher* has to be able to distinguish instructions by vector SIB length and the matcher only operates on the operands and the instruction flags, not on the bytecode. Export the vector index-ness into the operand flags and add to the matcher. This resolves BR 3392260. Reported-by: Agner <agner@anger.org> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
12 lines
476 B
NASM
12 lines
476 B
NASM
bits 64
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VGATHERQPS xmm1, [xmm0 + rsi], xmm2 ; OK
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VGATHERQPS xmm1, [ymm0 + rsi], xmm2 ; fail: error: invalid effective address
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VGATHERDPD ymm1, [xmm0 + rsi], ymm2 ; OK
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VGATHERDPD xmm1, [xmm0 + rsi], xmm2 ; OK
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VGATHERQPD xmm1, [xmm0 + rsi], xmm2 ; OK
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VGATHERQPD ymm1, [ymm0 + rsi], ymm2 ; OK
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VPGATHERQD xmm1, [xmm0 + rsi], xmm2 ; OK
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VPGATHERQD xmm1, [ymm0 + rsi], xmm2 ; fail: error: invalid effective address
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VPGATHERDQ ymm1, [xmm0 + rsi], ymm2 ; OK
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