H. Peter Anvin 04c21dc0c5 Allow synthesis of ROLX ...

If the shift amount is known, there is really no reason why we can't
accept "ROLX" as an alias for "RORX" with a modified shift operand.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>

2025-09-13 21:25:02 -07:00

..

bytecode.txt

Allow synthesis of ROLX

2025-09-13 21:25:02 -07:00

iflags.ph

Merge remote-tracking branch 'yongjie/master'

2025-09-13 20:10:04 -07:00

insns-iflags.ph

insns: add PROT flag if either EVEX or LONG is set

2024-08-23 13:15:46 -07:00

insns.dat

Allow synthesis of ROLX

2025-09-13 21:25:02 -07:00

insns.pl

Allow synthesis of ROLX

2025-09-13 21:25:02 -07:00

preinsns.pl

insns.dat/preinsns.pl: fix the RORX, SHLX, SHRX, SARX patterns

2025-09-13 20:44:53 -07:00

regs.dat

ndisasm: make the assembler (hopefully) work again

2025-08-30 16:16:43 -07:00

regs.pl

ndisasm: make the assembler (hopefully) work again

2025-08-30 16:16:43 -07:00

rex2.pl

x86: add Perl script for rex2 compatibility testing (not yet used)

2025-03-04 08:43:09 -08:00

x86const.h

apx: modify the tokenizer to be able to handle {dfv=...}

2024-07-27 17:57:08 -07:00