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https://github.com/netwide-assembler/nasm.git
synced 2025-09-22 10:43:39 -04:00
49a56ea9ee
Add a optimization frameword for operand narrowing (where the operand size doesn't matter beyond a certain range because only certain bits are referenced.) Add a macro *and* matching facility for dealing with segment selectors, which are typically rm16/r32/r64, but exactly how that is applied varies depending on if a datum is read or written. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
70 lines
990 B
NASM
70 lines
990 B
NASM
bits 64
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mov es,rax
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mov ss,rax
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mov ds,rax
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mov fs,rax
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mov gs,rax
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mov es,eax
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mov ss,eax
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mov ds,eax
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mov fs,eax
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mov gs,eax
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mov es,ax
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mov ss,ax
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mov ds,ax
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mov fs,ax
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mov gs,ax
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mov es,[rsi]
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mov ss,[rsi]
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mov ds,[rsi]
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mov fs,[rsi]
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mov gs,[rsi]
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mov es,word [rsi]
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mov ss,word [rsi]
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mov ds,word [rsi]
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mov fs,word [rsi]
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mov gs,word [rsi]
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%ifdef ERR
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mov es,qword [rsi]
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mov ss,qword [rsi]
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mov ds,qword [rsi]
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mov fs,qword [rsi]
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mov gs,qword [rsi]
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%endif
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mov rax,es
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mov rax,cs
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mov rax,ss
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mov rax,ds
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mov rax,fs
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mov rax,gs
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mov eax,es
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mov eax,ss
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mov eax,ds
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mov eax,fs
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mov eax,fs
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mov ax,es
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mov ax,ss
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mov ax,ds
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mov ax,fs
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mov ax,gs
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mov [rdi],es
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mov [rdi],cs
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mov [rdi],ss
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mov [rdi],ds
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mov [rdi],fs
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mov [rdi],gs
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mov word [rdi],es
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mov word [rdi],cs
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mov word [rdi],ss
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mov word [rdi],ds
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mov word [rdi],fs
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mov word [rdi],gs
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%ifdef ERR
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mov qword [rdi],es
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mov qword [rdi],cs
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mov qword [rdi],ss
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mov qword [rdi],ds
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mov qword [rdi],fs
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mov qword [rdi],gs
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%endif
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