mirror of
https://github.com/netwide-assembler/nasm.git
synced 2025-09-22 10:43:39 -04:00
e05867ce3d
- Significantly overhauled the disassembler internals to make better use of the information already in the instruction template and to reduce the implementation differences with the assembler - Add APX support to the disassembler - Fix problem with disassembler truncating addresses of jumps - Fix generation of invalid EAs in 16-bit mode - Fix array overrun for types in a few modules - Fix invalid ND flag on near JMP Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
122 lines
2.8 KiB
C
122 lines
2.8 KiB
C
/* insns.h header file for insns.c
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*
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* The Netwide Assembler is copyright (C) 1996 Simon Tatham and
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* Julian Hall. All rights reserved. The software is
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* redistributable under the license given in the file "LICENSE"
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* distributed in the NASM archive.
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*/
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#ifndef NASM_INSNS_H
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#define NASM_INSNS_H
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#include "nasm.h"
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#include "tokens.h"
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#include "iflag.h"
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struct itemplate {
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enum opcode opcode; /* the token, passed from "parser.c" */
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int operands; /* number of operands */
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opflags_t opd[MAX_OPERANDS]; /* bit flags for operand types */
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decoflags_t deco[MAX_OPERANDS]; /* bit flags for operand decorators */
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const uint8_t *code; /* the code it assembles to */
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uint32_t iflag_idx; /* some flags referenced by index */
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};
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/* Use this helper to test instruction template flags */
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static inline bool itemp_has(const struct itemplate *itemp, unsigned int bit)
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{
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return iflag_test(&insns_flags[itemp->iflag_idx], bit);
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}
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/* Disassembler table structure */
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/* Instruction tables for the assembler */
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struct itemplate_list {
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unsigned int ntemp;
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const struct itemplate *temp;
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};
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extern const struct itemplate_list nasm_instructions[];
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/* Instruction tables for the disassembler */
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extern const struct itemplate * const * const * const ndisasm_itable[];
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/* Common table for the byte codes */
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extern const uint8_t nasm_bytecodes[];
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/*
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* Pseudo-op tests
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*/
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/* DB-type instruction (DB, DW, ...) */
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static inline bool const_func opcode_is_db(enum opcode opcode)
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{
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return opcode >= I_DB && opcode < I_RESB;
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}
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/* RESB-type instruction (RESB, RESW, ...) */
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static inline bool const_func opcode_is_resb(enum opcode opcode)
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{
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return opcode >= I_RESB && opcode < I_INCBIN;
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}
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/* Width of Dx and RESx instructions */
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/*
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* initialized data bytes length from opcode
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*/
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static inline int const_func db_bytes(enum opcode opcode)
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{
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switch (opcode) {
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case I_DB:
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return 1;
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case I_DW:
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return 2;
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case I_DD:
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return 4;
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case I_DQ:
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return 8;
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case I_DT:
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return 10;
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case I_DO:
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return 16;
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case I_DY:
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return 32;
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case I_DZ:
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return 64;
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case I_none:
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return -1;
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default:
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return 0;
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}
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}
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/*
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* Uninitialized data bytes length from opcode
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*/
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static inline int const_func resb_bytes(enum opcode opcode)
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{
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switch (opcode) {
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case I_RESB:
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return 1;
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case I_RESW:
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return 2;
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case I_RESD:
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return 4;
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case I_RESQ:
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return 8;
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case I_REST:
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return 10;
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case I_RESO:
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return 16;
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case I_RESY:
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return 32;
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case I_RESZ:
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return 64;
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case I_none:
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return -1;
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default:
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return 0;
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}
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}
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#endif /* NASM_INSNS_H */
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