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e3f26e25a2
The shift and rotate patterns are "interesting" in the following way: 1. Even though only 4/5/6 bits of the input are ever used, for the regular instructions the input is specified as the CL register, but for the -X instructions as a size-matching register. This makes the optimization patterns "interesting." 2. The sequencing of legacy, VEX -X versions, APX EVEX, and APX -X For #1, allow any size register to contain the shift count. For #2, split up the macro generation of the patterns, and add a new "$xmacro" macro to deal with the combinatorics of generating all the -X patterns. Written directly in Perl since it seemed easier than trying to make anything more general for what is very much a special case... Reported-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com> Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>