These are subtle: RORX is only available in immediate shift count
form, whereas SHLX, SHRX and SARX are only available in register shift
count form...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add database entries and test cases for TILELOADD, TILELOADDT1,
TILELOADDRS, TILELOADDRST1 and TILESTORED.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add database entries for SHLX, SARX and SHRX (APX and non-APX). Add
tests to the newly added instructions.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add test cases and the database entry for the NEG and NOT instructions.
Fix the 0xF7 variants not generating due to a missing hash sign after f6.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add test cases.
Modify what I assume is a typo in the MUL clone of IMUL 0x6B. It should
only use 8bit IMM operand but the preprocessor has i# specified which
would allow other sizes too.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Both Win64 ABI and System V ABI clearly state that 16-byte stack
alignment is required _before_ the call, not after.
Added some additional details about the Win64 ABI, including a mention
of "shadow space", which is one of the less intuitive aspects.
Warnings are flushed at the end of each pass, but the segment
directive in outobj is only processed once. Therefore, keep track of
the originally requested alignment size so the warning can be
re-issued on later passes.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Without Z_LARGE64, compilation breaks on some platforms. Unfortunately
it seems that Z_SOLO disables Z_LARGE64...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
In at least one place, returned false instead of NULL, which caused
build failures on some platforms.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
When using the internal zlib, need to make sure to add the appropriate
-I option for the header...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
MOVRS is a pretty basic instruction; it uses the normal operand size
handling.
Fix apx.bin.t accordingly.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
There are currently six variations of each conditionals, and there may
be more in the future (e.g. %while). Stop trying to enumerate them all
everywhere.
Add support for index copying in the document processor.
Have pptok.pl auto-generate index metadata for conditional
preprocessor directives.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
