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mirror of https://github.com/netwide-assembler/nasm.git synced 2025-10-10 00:25:06 -04:00
Commit Graph

6 Commits

Author SHA1 Message Date
H. Peter Anvin
23ce05f906 treewide: replace verbose copyright headers with SPDX tags
SPDX is an international standard for documenting software license
requirements. Remove the existing headers and replace with a brief
SPDX preamble.

See: https://spdx.dev/use/specifications/

The script used to convert the files is added to "tools", and the
file header templates in headers/ are updated.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-01 11:45:31 -07:00
H. Peter Anvin
e05867ce3d ndisasm: make the assembler (hopefully) work again
- Significantly overhauled the disassembler internals to make
  better use of the information already in the instruction template
  and to reduce the implementation differences with the assembler
- Add APX support to the disassembler
- Fix problem with disassembler truncating addresses of jumps
- Fix generation of invalid EAs in 16-bit mode
- Fix array overrun for types in a few modules
- Fix invalid ND flag on near JMP

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-08-30 16:16:43 -07:00
H. Peter Anvin
557d99d796 insns: more macro goodness
Even better macro support, add match for the BX register.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-14 20:48:18 -07:00
H. Peter Anvin
a556ea3edf regs: clean up and somewhat automate register range flags
Doing the register range flags by hand is a bit more work than
necessary when dealing with APX, so auto-generate the flags for ranges
{0, 1-15, 16+} using 3 bits.

In theory we could handle even more automagically by splitting ranges
up further: the existing ranges are sets of {0, 1, 2, 3, 4-5, 6-7,
8-15, 16-31} which would require 7 bits, although it would remove most
of the subclass bits for registers; it would require separating the
subclass bits for EAs from the ones for registers (which might be a
good idea anyway...)

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-23 16:04:47 -07:00
H. Peter Anvin
b31a4c9906 Add support for new instructions from ISE June 2020
Add support for new instructions as defined in the Instruction Set
Extensions manual as of June 2020.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2020-07-16 21:52:15 -07:00
H. Peter Anvin
e1f985c167 Reorganize the source code into subdirectories
Make the source code easier to understand and keep track of by
organizing it into subdirectories depending on the function.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2016-05-25 12:06:29 -07:00