2 Commits

Author	SHA1	Message	Date
H. Peter Anvin	e05867ce3d	ndisasm: make the assembler (hopefully) work again ... - Significantly overhauled the disassembler internals to make better use of the information already in the instruction template and to reduce the implementation differences with the assembler - Add APX support to the disassembler - Fix problem with disassembler truncating addresses of jumps - Fix generation of invalid EAs in 16-bit mode - Fix array overrun for types in a few modules - Fix invalid ND flag on near JMP Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>	2025-08-30 16:16:43 -07:00
H. Peter Anvin	3efdd3cf9a	assemble: rex2.w; hinted Jcc in 64-bit mode; UDB ... - rex2.w is used as a opcode extension (JMPABS), not rex2.x1 as an earlier version of the spec had. - Segment prefixes used as Jcc hints are valid in 64-bit mode. - Avoid duplicate warning messages for ignored/invalid prefixes. * emit_prefixes() is called twice during code generation. - Add the UDB #UD opcode in 64-bit mode; SALC is 16/32-bit only. Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>	2025-08-29 13:55:30 -07:00