The list_last() macro is a statement macro; wrap it in a
do { ... } while(0) block to prevent accidental misuse.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
[ hpa: only one of the defined issues was valid, removed the rest. ]
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The GROUP directive can now be specified more than once for a group,
and the result is cumulative (the union of all specified groups.)
Signed-off-by: KO Myung-Hun <komh78@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Officially the syntax for TEST is "rm,reg"; however TEST is
commutative in every aspect, and as such "reg,mem" is an equivalent
form that NASM has also supported in the past.
Reinstate it properly.
Fixes: https://bugzilla.nasm.us/show_bug.cgi?id=3392962
Reported-by: E. C. Masloch <pushbx@ulukai.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Merge PRs 127, 126, 125, 124 and 91. Document some of the most relevant
changes.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
-- TCMMIMFP16PS, TCMMRLFP16PS instructions
-- AMX.asm fix: Similar to GATHER instructions, 3-operand AMX instructions cannot have the same operand more than once
Checked with XED version: [v2025.06.08]
see Intel® Architecture Instruction Set Extensions and Future Features Programming Reference, March 2025 319433-057
else (without this correction) it conflict with VPERMI2PS
If a line is suppressed, the %if or %rep condition must never be
evaluated. Test for it, and add the exitrep test to travis.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
When a line is suppressed there is no guarantee that it is
syntactically valid, so treat it exactly like a dead %if branch.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Looks like there are enough critical changes to justify a release
without a bunch of new development. Let's just call the new
release 3.01 and avoid a bunch of excess dottage.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The column width really wasn't quite enough.
Make the text size in Appendix F which can be rather wide
smaller. There is also no real reason to put that in a background box.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Obj2 is an obj variation for OS/2.
Obj2 has the following differences from obj.
1. Default attributes for a segment are ALIGN=16 and USE32.
2. Add a segment to FLAT group implicitly if 32-bit segment.
3. Recognize Unix sections .text, .rodata, .data and .bss as TEXT32,
CONST32, DATA32 and BSS32 respectively for compatibility with other
Unix platforms.
4. Set default classes implicitly for known segments such as TEXT32,
CONST32, DATA32, BSS32 and so on.
Signed-off-by: KO Myung-Hun <komh78@gmail.com>
With warnings disaggregated, there is no reason to play games with not
updating the output timestamp. Always write the files as usual.
Remove unnecessary Makefile rules.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
1# Please enter the commit message for your changes. Lines starting
The idea of putting the warnings in the source code was a nice one,
really, but it ended up being a nightmare from the perspective of
build dependencies. Disaggregate them, and tweak the documentation for
easier reading.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
pragma->tail is described as "anything after the operation", but
existing parsing passed just the first whitespace-delimited
word. Change the parsing to just strip leading and trailing
white space off the rest of the line, but keep interior spaces
if there are any.
This is preparation for a build_version pragma for Mach-O matching
the llvm-as .build_version syntax.
Signed-off-by: Fabian Giesen <fabian.giesen@epicgames.com>
You have to check that something that isn't standard C actually exists
before trying to use it...
Cc: Colin Ian King <colin.i.king@intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Turns out that the hotspots of nasm are mainly on string hashing
when accessing memory. A simple performance improvement is to
prefetch the first cacheline of a string to be hashed. Ran 50 tests
on an i9-12900 building intel-ipsec-mb that heavily uses nasm and
improved wall clock build times from 56.1 seconds to 53.2 seconds or
around 5% speed improvement.
Signed-off-by: Colin Ian King <colin.i.king@intel.com>