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Commit Graph

473 Commits

Author SHA1 Message Date
H. Peter Anvin
5225d57cd7 Correctly handle instruction masking based on {zu} flag
Fix instruction masking based on {zu} flag.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-03 18:54:13 -07:00
H. Peter Anvin
dda9152b35 apx: smarter determination of REX2 prefix eligibility
REX2 encoding is mostly default, so flag the instruction patters which
do *not* support REX2 instead.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-31 16:18:17 -07:00
H. Peter Anvin
fd08822070 apx: implement JMPABS
Implement the JMPABS instruction, which can also be specified as JMP
ABS for consistency. Since ABS is already a keyword, this does not
pollute the namespace.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-30 17:32:00 -07:00
H. Peter Anvin
973fe19a1b WIP: apx: now can encode most instructions; handle subcases in EVEX
EVEX encoding is really messy, with the 4th register bit in one of
several places depending on which type of register it is. It seems to
work now.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-30 17:03:58 -07:00
H. Peter Anvin
2e4df506e0 WIP: APX: can now generate code for tested APX instructions
a
Support generating code for APX instruction and add support for the
{nf} prefix.

No disassembler support yet, and only a handful instructions encoded.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-29 20:58:04 -07:00
H. Peter Anvin
fc82905b3c test: add some additional test cases
Some test cases, mostly from bug reports.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-01-29 17:25:23 -08:00
Tomasz Kantecki
5f684412c7 x86/insns.dat: SHA512-NI VEX support
Add support for VEX-encoded SHA512-NI instructions.

Signed-off-by: Tomasz Kantecki <tomasz.kantecki@intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-01-29 16:21:21 -08:00
H. Peter Anvin
dd52f386b9 x86: implement FRED: ERETS, ERETU, LKGS
Kind of embarrassing... I had not implemented the FRED instruction,
despite personally being one of the architects of FRED ;)

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-12-14 17:04:49 -08:00
H. Peter Anvin
9f83c383e4 preproc, %map(): require second colon, update documentation
Require the second colon before the grouped parameter count; otherwise
the syntax is ambiguous since an expression can start with (.

Update/complete the documentation and the examples.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 13:42:16 -07:00
H. Peter Anvin
34eefd3803 preproc: add %map() function and radix specifiers
Add the %map() function which can apply arguments to a macro from a
list.

Allow the user to specify the desired radix for an evaluated
parameter. It doesn't make any direct difference, but can be nice for
debugging or turning into strings.

As part of this, split expand_one_smacro() into two parts: parameter
parsing and macro expansion. This is a very straightforward splitting
of two mostly unrelated pieces of functionality.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-15 22:43:28 -07:00
H. Peter Anvin
73676357de BR 3392906: error out on bad syntax "db 1 2"
NASM would try to "eat the comma token" in db expressions, even for
cases where the token was not a comma. Fix that and error out
properly.

To give better error messages, track where in the input string a token
starts or ends. This information is only valid as long as the input
string is kept, but that is just fine for error messages during
parsing.

Reported-by: Peter Cordes <pcordes@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-11 12:06:58 -07:00
H. Peter Anvin
55dc058356 Document CPU LATEVEX, add CPU EVEX and CPU VEX flags
Document CPU LATEVEX and the associated prefixes; add CPU EVEX and CPU
VEX flags to further control encodings.

Fix the error message for invalid encodings due to flags.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2022-12-07 10:11:21 -08:00
H. Peter Anvin
91c33896a3 latevex: add test file
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2022-12-06 13:41:33 -08:00
H. Peter Anvin
36cd305ade preproc: add %abs(), modify %num(), refactor
Add the %abs() function, to produce the absolute value as an
always-positive decimal constant.

Change the order of the arguments for %num().

Refactor the handling of optional arguments, to reduce the amount of
redundant code. This is currently only used for builtin functions, but
might be extended in the future.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2022-11-17 15:29:10 -08:00
H. Peter Anvin
93548c2de2 rdoff: kill it off
RDOFF has been deprecated as it has unfixable problems, and has been
announced that it will be killed off in NASM 2.16.

This deletes it once and for all.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2022-11-07 16:49:13 -08:00
H. Peter Anvin
b18e870d90 Merge remote-tracking branch 'ElyesH/typos' 2022-11-07 12:39:44 -08:00
Sławomir Bocheński
dffc514af7 Add test case for istruc's "at" with local labels
Signed-off-by: Sławomir Bocheński <lkslawek@gmail.com>
2022-09-09 00:30:24 +02:00
Elyes HAOUAS
cdf7ad02c2 Fix some typos
while on it, remove unneeded white spaces.

Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
2022-01-09 17:34:35 +01:00
H. Peter Anvin
2469b8b66e Add {rex} prefix, simplify prefix handling, better error messages
Add a {rex} prefix to force REX encoding (typically a redundant 40h
prefix).

For prefix parsing, we can use t_inttwo to encode the prefix slot
number.

Give more verbose error messages for encoding mismatches.
2021-04-27 11:37:42 -07:00
H. Peter Anvin (Intel)
cc843efa38 Merge tag 'nasm-2.15.04'
NASM 2.15.04

Conflicts:
	asm/listing.h
	asm/pptok.pl
	asm/preproc.c
	version

This doesn't pass travis test 3392711, which is using an extremely odd
construct of %?? in the middle of an argument sequence for an smacro
while not being in a macro itself, and expecting it to expand to the
macro name. This seems to *really* confuse the master branch.

Resolve this later...
2020-08-25 16:16:09 -07:00
H. Peter Anvin (Intel)
bae6b070ff BR 3392705: AVX512: reinstate the SSE-like opcodes for VPCMPEQ/GT
The VPCMP instructions are controlled by an immediate byte, but there
is also a set of SSE-derived legacy opcodes for VPCMPEQ and
VPCMPGT. For the specific cases of VPCMPEQ and VPCMPGT, prefer those
opcodes since they are one byte shorter.

Reported-by: ig <glucksmann@avast.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-30 16:56:52 -07:00
H. Peter Anvin (Intel)
6299a3114c BR 3392708: fix NULL pointer reference for invalid %stacksize
After issuing an error message for a missing %stacksize argument, need
to quit rather than continuing to try to access the pointer.

Fold uses of tok_text() while we are at it.

Reported-by: Suhwan <prada960808@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-30 15:57:57 -07:00
H. Peter Anvin (Intel)
6ac6ac57e3 parser: when flattening an eop, must preserve any data buffer
An eop may have a data buffer associated with it as part of the same
memory allocation. Therefore, we need to move "subexpr" up instead of
merging it into "eop".

This *partially* resolves BR 3392707, but that test case still
triggers a violation when using -gcv8.

Reported-by: Suhwan <prada960808@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-30 15:48:45 -07:00
H. Peter Anvin (Intel)
e56c2dc5b7 insns.pl: audit for impossible Sx patterns; fix a few
Break the instruction processing if there are impossible combinations
of Sx flags and operand sizes. If the intent is to always require
explicit sizes, use the SX flag.

The INSERTPS instruction pattern was explicitly wrong, the rest of
these are nuisance fixes.

TODO: fix the disassembler to be able to exclude patterns where these
bits don't matter.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-30 15:16:11 -07:00
H. Peter Anvin (Intel)
b6ba0a23f9 BR 3392701: outcoff: remove weird padding code
It seems that the odd alignment-padding code was simply dead in older
versions of NASM. This means that the COFF backend behavior really was
the same as the other backends. Remove that stale code and revert to
previous/common behavior.

Reported-by: ig <glucksmann@avast.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-27 12:28:09 -07:00
H. Peter Anvin
6263a2a4c2 preproc: add %*? and %*??
The %? and %?? tokens are ambiguous when used inside a multi-line
macro. Add tokens %*? and %*?? that only expand during single-macro
expansion.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-18 13:47:59 -07:00
H. Peter Anvin
d6b8c53b8c Merge tag 'nasm-2.15.03'
NASM 2.15.03

Resolved Conflicts:
	asm/preproc.c

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-17 17:58:38 -07:00
H. Peter Anvin
d081f0db5d fp: support bfloat16 constants
Support generating bfloat16 constants. This is a bit awkward, as "DW"
already generates IEEE half precision constants; therefore there is no
longer a single floating-point format for each size. This requires
some replumbing.

Fortunately bfloat16 fits in 64 bits, so support generating them with
a macro that uses __?bfloat16?__() to convert to integers first before
passing them to DW.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2020-07-16 23:11:03 -07:00
H. Peter Anvin
b31a4c9906 Add support for new instructions from ISE June 2020
Add support for new instructions as defined in the Instruction Set
Extensions manual as of June 2020.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2020-07-16 21:52:15 -07:00
H. Peter Anvin (Intel)
42a73b776a test/winalign.asm: simple test for COFF alignment
Simple test case based on debugging BR 3392692.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-10 18:14:54 -07:00
H. Peter Anvin (Intel)
bb3156533b ppindirect.asm: make it possible to assemble to a binary
Add a couple of dd/db directives to ppindirect.asm to make it possible
to actually run it through the assembler.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-10 17:24:43 -07:00
H. Peter Anvin (Intel)
be1be3f627 %use masm: much better documentation
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-10 02:46:23 -07:00
H. Peter Anvin (Intel)
b3c5545556 test/Makefile: fix command line for .obj format
The command line for .obj had a stray -F.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-10 01:54:38 -07:00
H. Peter Anvin (Intel)
c36cdf8a55 Merge remote-tracking branch 'github/debug-macros'
Resolved Conflicts:
	version

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-09 21:16:49 -07:00
H. Peter Anvin (Intel)
422c8c4f1e k_test.asm: comment out %pragma list options
Disable the %pragma list options in k_test.asm to avoid nasty
surprises. LISTOPT is -L+ by default and can be overridden on the
command line, so the %pragma is not just unnecessary but problematic.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-08 09:03:08 -07:00
H. Peter Anvin (Intel)
8f385ec6a0 test/Makefile: allow overriding -L+
Add a LISTOPT to make it possible to override -L+ without a bunch
of painful additional options.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-08 08:52:49 -07:00
H. Peter Anvin (Intel)
ecb9b773f2 test/Makefile: the debug option for -f dbg is -gdebug
If a format is specified explicitly for the debug format, it needs to
be "debug", not "dbg". Lovely inconsistency.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-06 10:19:38 -07:00
H. Peter Anvin
63769c588e Merge remote-tracking branch 'github/nasm-2.15.xx' 2020-07-05 15:27:04 -07:00
H. Peter Anvin (Intel)
5b7369d7e0 Make debug info and error messages correctly reflect macros and reps
1. Error messages would issue with the line number of %endrep.
2. Debug line information would ignore both macros and reps.
   This is doubly wrong; macros are semantically equivalent to
   inline functions, and it is expected that debuggers trace
   into these functions.

These changes finishes the last parts of moving all responsibility for
the listing enable/disable into the preprocessor, so remove the
way over-complicated macro inhibit facility from the listing module
entirely.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-07-05 02:16:13 -07:00
H. Peter Anvin (Intel)
a3db726f02 Merge remote-tracking branch 'github/nasm-2.15.xx'
Resolved Conflicts:
	version

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-30 17:14:36 -07:00
H. Peter Anvin (Intel)
7f1095a023 emptyarg.asm: add expansion test for a range with a single parameter
Add a test for %{1:1}, as reported in BR 3392611.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-30 12:54:21 -07:00
H. Peter Anvin (Intel)
e99a946390 preproc: fix %{:} macro operand ranges
Fix the handling of %{:} macro operands. Use the same code for
expanding the subarguments as for normal arguments.

This (hopefully) resolves the following bug reports:
  BR 3392611, BR 3392686, BR 3392688

Reported-by: <coconutfaistoslimeregistry@gmail.com>
Reported-by: Jasper Lievisse Adriaanse <r+nasm@jasper.la>
Reported-by: Jason Hood <jadoxa@yahoo.com.au>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-30 11:51:41 -07:00
H. Peter Anvin (Intel)
43a72dd638 listing: list short reserved blocks as ?? instead of <res ...>
<res ...> can get rather annoying when mixed in with data, as can
happen with the MASM-like db syntax. List shorter blocks (8 bytes or
less) as ?? instead; 8 bytes avoids line breaks for a single
statement.

This is probably more readable anyway...

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-27 23:30:33 -07:00
H. Peter Anvin (Intel)
513e19c8da Merge tag 'nasm-2.15'
NASM 2.15

Resolved Conflicts:
	version
2020-06-27 15:36:59 -07:00
H. Peter Anvin (Intel)
47d207d1a3 test: add Makefile target for elfx32
Add an .ox Makefile target for an ELFx32 object.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-26 16:14:31 -07:00
H. Peter Anvin (Intel)
922afbfc6c test: enable debugging output
There is no reason why we should not emit debugging output when
compiling test files for manual analysis, quite the contrary.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-26 14:09:47 -07:00
H. Peter Anvin (Intel)
82fc1bea76 doc: document operator and Dx changes
Document new operators, removal of special casing for %if, and the
MASM-like enhancements to the Dx directives.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-25 15:46:09 -07:00
H. Peter Anvin (Intel)
d85a6101d7 BR 3392681: handle a64 instruction patters correctly
The a64 instruction patterns would incorrectly force REX to zero at a
point where REX prefixes have already been assigned. This is not only
incorrect in case of instructions which can use high registers, but it
causes an assertion failure. It happened to work for J*CXZ and LOOP*.

Reported-by: Philip Lantz <philip.lantz@intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-22 13:52:02 -07:00
H. Peter Anvin (Intel)
2383281768 Merge tag 'nasm-2.15rc8'
NASM 2.15rc8
2020-06-14 23:02:53 -07:00
H. Peter Anvin (Intel)
42894381c9 preproc: even more handling of backwards compatibility for mmacros
Legacy multi-line macro argument expansion really is very
complicated. With these changes, all legacy tests seem to pass, and
the only differences with NASM 2.14.xx are that some macros which
should have been expanded and were not now are.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2020-06-14 19:42:22 -07:00