EVEX encoding is really messy, with the 4th register bit in one of
several places depending on which type of register it is. It seems to
work now.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
a
Support generating code for APX instruction and add support for the
{nf} prefix.
No disassembler support yet, and only a handful instructions encoded.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
We use this all over the place, so make these general. The sign
extension function existed as signed_bits(), but that is an awfully
confusing name.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the byte code format and the byte code compiler to be able to
generate various kinds of APX-format instructions.
THE NEW BYTE CODES ARE NOT YET IMPLEMENTED IN THE ASSEMBLER OR
DISASSEMBLER.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
{dfv=} is basically a constant (immediate). Treat it as such during
parsing, except that if "naked" (not in an expression), it has special
matching properties and does not need a terminal comma.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Change the handling of {dfv=} to a more general "braced constant"
expression, to be tagged with an instruction flag to make sure they
match the instruction in question.
This really ought to be an operand flag, but the opflags are precious;
as the CCMP/CTEST instructions can also take an immediate it probably
is necessary to invent a "special immediate" operand type that can
fold these together.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The {dfv=} prefix sequences for the CCMP and CTEST instructions need
special handling in the parser. This means a fair bit of new magic in
the handler of the parser, but it just adds to the fun.
Try to make this as general as possible, so we can use it for other
things.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Clean up the handling of prefixes in general. Allow a set of braced
prefixes to follow the instruction; this is required for things like
{dfv=} but might also be a nicer syntax for things like {rex}.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Doing the register range flags by hand is a bit more work than
necessary when dealing with APX, so auto-generate the flags for ranges
{0, 1-15, 16+} using 3 bits.
In theory we could handle even more automagically by splitting ranges
up further: the existing ranges are sets of {0, 1, 2, 3, 4-5, 6-7,
8-15, 16-31} which would require 7 bits, although it would remove most
of the subclass bits for registers; it would require separating the
subclass bits for EAs from the ones for registers (which might be a
good idea anyway...)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add the %map() function which can apply arguments to a macro from a
list.
Allow the user to specify the desired radix for an evaluated
parameter. It doesn't make any direct difference, but can be nice for
debugging or turning into strings.
As part of this, split expand_one_smacro() into two parts: parameter
parsing and macro expansion. This is a very straightforward splitting
of two mostly unrelated pieces of functionality.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
NASM would try to "eat the comma token" in db expressions, even for
cases where the token was not a comma. Fix that and error out
properly.
To give better error messages, track where in the input string a token
starts or ends. This information is only valid as long as the input
string is kept, but that is just fine for error messages during
parsing.
Reported-by: Peter Cordes <pcordes@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
For VEX instructions created *after* the corresponding EVEX
instructions, we need the user to either explicitly declare them {vex}
or specifying "cpu latevex".
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Instead of handling conditional instructions ad hoc, generate
individual instruction patterns as normal. This simplifies the code
and makes CMPccXADD support simpler (otherwise it would be necessary
to hack in the handling of a condition code in the middle of an
instruction.)
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The FP16 patch had a case of bit overlap. Clean up the handling of
broadcast flags a little in the process.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add support for AVX512-FP16 instructions and the associated
handling. Allow "mapN" syntax as well as "mN" syntax to match the
documentation.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Add a {rex} prefix to force REX encoding (typically a redundant 40h
prefix).
For prefix parsing, we can use t_inttwo to encode the prefix slot
number.
Give more verbose error messages for encoding mismatches.
These two symbolic names were reversed. In practice, the code uses '('
and ')' instead, so it wasn't a problem, but still very confusing.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
We need the ability to produce consistent output for our own tests,
anyway, so make this a user-accessible feature. This was requested in
BR 3392635.
This obsoletes the NASM_TEST_RUN environment variable; simply use the
normal NASMENV environment variable instead.
The .obj tests in travis needed to be updated in order to remove the
rather pointless suffix " CONST" from the NASM signatures.
Reported-by: Joshua Watt <JPEWhacker@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
NASM 2.15.04
Conflicts:
asm/listing.h
asm/pptok.pl
asm/preproc.c
version
This doesn't pass travis test 3392711, which is using an extremely odd
construct of %?? in the middle of an argument sequence for an smacro
while not being in a macro itself, and expecting it to expand to the
macro name. This seems to *really* confuse the master branch.
Resolve this later...
At least DWARF can encode C-style macros. In doing so, it wants the
file include hierarchy, so give the debug format backend the option of
receiving that information from the preprocessor.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
BNDMK, BNDLDX, and BNDSTX are split-SIB (MIB) instructions, but do
*not* require a SIB encoding. However, TILELOAD* and TILESTORE* *do*
require a SIB in all cases. Split the MIB flag into MIB (split
address) and SIB (SIB required) flags.
This fixes travis test mpx.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add a new macro vprintf_func() for vprintf-style functions, and add
printf_func() and vprintf_func() attribute arguments whereever
meaningful.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Support generating bfloat16 constants. This is a bit awkward, as "DW"
already generates IEEE half precision constants; therefore there is no
longer a single floating-point format for each size. This requires
some replumbing.
Fortunately bfloat16 fits in 64 bits, so support generating them with
a macro that uses __?bfloat16?__() to convert to integers first before
passing them to DW.
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
The different token codes between the preprocessor and the assembler
is a completely unnecessary headache. Furthermore, lumping all the
operators under TOK_OTHER in the preprocessor causes a whole bunch of
unnecessary headaches.
In combining them, the only tricky part is that PP_CONCAT_MASK() is no
longer usable, as the range of token codes is too large. Replace with
dedicated category masks.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
ERR_PASS1 only remains in three places:
a. Unterminated %! string, an error
- Should be signalled no matter which pass it is encountered in
b. Two cases of map file problems in outbin
- The buffered warning system take care of that issue
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Fold the prepreprocessor and the nop preprocessor into the main
preprocessor. This means handling # cpp-like lines and TASM
compatibility tokens in the preprocessor proper, but that is really
not very hard to do.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Signed and unsigned are really two flags; might as well allow this
field to contain additional flags.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
If the segment number changes, we also need to invoke dfmt->linenum(),
as a .nolist macro may end up emitting to more than one section.
This also adds the source location explicitly to the output data
structure; the cost for that is minimal, and will enable a more
sophisticated debug backend to receive the entire data structure in
the future.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
list_reverse() used "next" as an argument, while also needing to
refer to the structure field "next". Furthermore, the two temp
variables can be made generic by making them void *, and as this is
not a loop construct this is doable by declaring them inside the macro
loop.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Sometimes we want to search for an exact key only, and reject the case
when tree->key < key. Add rb_search_exact() for this purpose, rather
than forcing the caller to perform the comparison in open code.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Collect macro call/nesting information for the benefit of the debug
back end. So far, the only backend for which this is provided is the
debug back end, to show what information is present.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Add operations to get the first and last entry in the tree,
respectively. Searching for 0 or ~UINT64_C(0) is not sufficient in the
presence of duplicated keys, and is more inefficient anyway.
rb_first() followed by rb_next() until NULL, or equivalently rb_last()
followed by rb_prev() until NULL, can be used to walk the tree in key
order (ascending or descending), including all duplicate key
entries.
Since this is a *threaded* tree now, this walk can safely free entires
as it goes along, as long as the whole tree is destroyed; once any one
entry has been freed, the tree is no longer valid for anything other
than proceeding with the same tree walk.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Change the left-leaning red-black (LLRB) trees into left-leaning
threaded red-black trees. Instead of NULL pointers at leaf nodes, use
the otherwise unused field as a pointer to the lexical predecessor
(left) or successor (right). This allows fast previous/next
interator operation without needing to keep track of the root of the
tree at all times.
The additional metadata that needs to be kept can be done for "free"
simply by changing "bool red" into a flag field.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Update the table used by pass_type() to give the name of the pass
type. It was not updated properly after PASS_PREPROC was added.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Still technically not defined behavior, but this *should* work on all
reasonable or semi-reasonable systems.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
