When dealing with bitmasks/bitfields, definining them in macros tends
to cause a lot of desirable constants out because it is a pain to
create all of them. C macros can't create other macros, but they
*can* be used to create fields in an enum, so provide some neat
convenience macros for doing so.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
An earlier version of the AVX10.2 documentation had support for ER and
SAE in 256-bit vectors using a special encoding. This was never
implemented, and has since been removed from the spec.
Remove from NASM, too.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The control and debug registers are always using the default operand
size. It is probably easiest to just encode it explicitly for now.
Control registers are particularly weird because of the AMD "lock as
REX.R" hack...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Far jmp and call are special in many ways... not the least because of
the old legacy syntax of putting the size on the segment instead of
the offset.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
If the user requests a map file, the user needs to be able to
get it!
It should have been an error, not a warning, all along.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Using "extern" or "required" after the definition should be
interpreted as "global", just as if "extern" or "required" had been
specified before the definition.
Unfortunately the code did not correctly handle the case of upgrading
from LOCAL to GLOBAL via an EXTERN or REQUIRED directive, only from
EXTERN or REQUIRED to GLOBAL via definition or a GLOBAL or COMMON
directive.
Fix.
Reported-by: E. C. Masloch <pushbx@ulukai.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Do not force the operand size for K registers and "ko#"
encodings. This resolves BR 3392957.
Reported-by: ig <glucksmann@avast.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
A pattern for XCHG was incompletely macroized. This caused a
fallthrough to the next pattern, reversing the operands, but would
probably have had generated incorrect code in at least some cases.
Beef up the xchg test.
Reported-by: E. C. Masloch <pushbx@ulukai.org>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
Instead of do more ad hoc hacks in preinsns.pl, add explicit macro
flags for the arithmetic instructions. This also allows folding CMP
back into the standard arithmetic instructions.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
ADC and SBB don't support using the {nf} prefix. They are the only one
in the arithmetic instructions group that are this way.
Add a flag that will warn when an instructions wants to use {nf} but
doesnt' support it.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Apparently the has_attribute() macro triggers false positives on at
least gcc 5.3, which is the version that the build server uses with
djgpp.
Drop using it, so much for trying to be standards-compliant...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
- Add some features to autoconf that makes it cleaner and faster
- Modernize some of the autoconf macros
- Update compiler.h with some C23 features
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
I missed that LZCNT can use REX2, two other TODOs were fixed by changes
made by Peter in between my patches.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add the database entry for CTESTcc and the relevant test cases. The
syntax is basically CCMPSCC without two syntax variants.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Start splitting of tests to other files because the apx.asm is getting
very big and hard to read when multiple errors happen.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Convenience preprocessor functions that allows for efficient packing
of binary data in source code.
Move some functions that has previously been local but are more
generally useful into more accessible places.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
It is sometimes just too convenient to be able to convert between
strings and bytes at will. At one point I was considering making
something with the full power of the db (et al) directives, but that
is a much bigger change...
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The external call to hexdump was broken and would hang if the output
exceeded the host operating system size limit. Since it *anyway*
was reading the entire dump into RAM, just rewrite it in native
Python.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
S_ISREG() is usually a macro, it needs PA_HAVE_FUNC().
Don't bother checking for functions related to struct _stati64 if that
definition doesn't exist.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The POSIX names for these functions are htole*(). Use those
preferentially.
Speed up autoconf by allowing early-out during alternative function
searches.
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
The last testcase hangs the travis test system. The cfcmovb rv rv syntax
seems to cause problems for some reason.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add a very long list of tests checking most combinations of this
instruction syntax.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
The encodings of 'true' and 'false' variants of the CCMPSCC instructions
were swapped. Correct that in the preprocessor script.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Add database entries and test cases for WRSSD, WRSSQ, WRUSSD and WRUSSQ
instructions.
Fix whitespace in legacy database entries.
Signed-off-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
