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mirror of https://github.com/netwide-assembler/nasm.git synced 2025-10-10 00:25:06 -04:00

5525 Commits

Author SHA1 Message Date
H. Peter Anvin (Intel)
7e82d9d1e3 Add a default-error warning for impossible o64, a64, or a16 prefixes
The o64, a64 and a16 prefixes are only possible in specific
modes. It is a lot easier to debug with a more sensible error message.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 19:24:07 -07:00
H. Peter Anvin (Intel)
a16571a705 doc/directiv.src: fix missing ] in prefix/suffix documentation
The prefix/suffix directive documentation were missing some brackets,
lost in the course of editing.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 17:29:00 -07:00
H. Peter Anvin (Intel)
b8e256a475 changes.src: add missing \>
Add missing \> marker (bulleted list continuation.)

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 17:25:54 -07:00
H. Peter Anvin (Intel)
f87fb5c957 nasm.spec.in: change http:// to https://
Change URLs to https://.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 17:19:54 -07:00
H. Peter Anvin (Intel)
b453f9e8ea nasm.spec.in: be extra obnoxious about build requirements
It is better to put in too many BuildRequires than too few.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 17:19:09 -07:00
Igor Glücksmann
35ef2e2d1a Fixed PDF doc line overflow
Resolved Conflicts:
	doc/nasmdoc.src

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 17:08:35 -07:00
H. Peter Anvin (Intel)
69c25535ae NASM 3.01rc8 nasm-3.01rc8 2025-10-09 16:15:52 -07:00
H. Peter Anvin (Intel)
ddf85b55ed changes.src: update release notes
Add recent changes to the release notes.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 16:14:58 -07:00
H. Peter Anvin (Intel)
3d96ea651a assemble: weaken the test for "absolute address can not be RIP-relative"
The test for "absolute address can not be RIP-relative" is too strict
and causes false positive failures.

Fixes: https://github.com/netwide-assembler/nasm/issues/145
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 16:10:35 -07:00
Nico Weber
a8a1dc2b0c Fix Wbitwise-instead-of-logical warning
`a || b` only evaluates b if a is false. `a | b` always evaluates
both a and b. If a and b are of type bool, || is usually what you
want, so clang now warns on `|` where both arguments are of type bool.

This warning fires once in nasm. It looks like `|` is an (inconsequential)
typo of `||`, so use that instead.

No intended behavior change.
2025-10-09 15:48:18 -07:00
H. Peter Anvin (Intel)
9b101e9316 insns.pl: register 0 should add RN_ZERO, not RM_ZERO
Not all registers are valid as memory references, and thus
using RM_ZERO is incorrect. Use RN_ZERO instead, which is simply the
zero-register bit.

Fixes: https://github.com/netwide-assembler/nasm/issues/140
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 15:42:29 -07:00
KO Myung-Hun
0c8379825e openwcom.mak: use internal commands if possible
[ hpa: added comment that "rm" really is a WMAKE internal command. ]

Signed-off-by: KO Myung-Hun <komh78@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 15:05:29 -07:00
KO Myung-Hun
29a5aabd7a Fix compilation with Open Watcom
Open Watcom does not support 64-bit constants at 'case'.

[ hpa: I'm pulling this, but I'm really, *really* questioning its
supportability long term. The OpenWatcom people need to fix this, or
we are just going to have to say "OW is not supported."

At some point we *are* going to move to a "C99 is baseline" policy for
code; there are simply too many features in C99 that are actively
painful to be without.

That is, unless we decide to go to C++, which is under consideration
but is a much bigger job. In that case, the target will probably be
either C++11 or C++14 as those C++ versions contain some pretty
essential features. ]

Signed-off-by: KO Myung-Hun <komh78@gmail.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 14:52:29 -07:00
H. Peter Anvin (Intel)
013db3d446 nasmlib: rename crc32.c to crc32b.c to avoid conflict with zlib/crc32.c
For the benefit of those platforms which have to rely on VPATH, avoid
having the same filename in multiple subdirectories.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 14:49:22 -07:00
InstLatx64
378ee0e9c5 AMX-TRANSPOSE: removed, retag instructions NEVER.
All the 16 AMX-TRANSPOSE instructions were removed from the 59th
edition of "Intel Architecture Instruction Set Extensions and Future
Features Programming Reference" September 2025, 319433-059.

Similar to PCOMMIT, they are tagged as 'NEVER'

[ hpa: don't remove from tests, but suppress the warnings.  Don't
  remove the CPUID tag; a future version of NASM will actually implement
  CPU filtering based on the various CPUID tags; that development is
  genuinely in progress. ]

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 14:44:24 -07:00
InstLatx64
62b610ad86 Feature flag change, remove duplicate: AVX512FC16->F16C
VEX version of VCVTPH2PS, VCVTPS2PH is F16C

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-09 14:29:09 -07:00
H. Peter Anvin (Intel)
43f9a71fc0 NASM 3.01rc7 nasm-3.01rc7 2025-10-08 13:12:29 -07:00
Yongjie2017
a684942de0 the list file existing or not should not fail the copy instead fail the nasm compiling itself so nasm -v is excused 2025-10-08 13:07:07 -07:00
Yongjie Sheng
420313da8c add project test support to dav1d 2025-10-08 13:07:07 -07:00
H. Peter Anvin (Intel)
be03f169b9 travis: let "make travis" show the errors if any
Grep for FAIL in the log and print any errors, otherwise a success
message.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-08 13:03:40 -07:00
H. Peter Anvin (Intel)
51dce26137 travis improvements: look for python3, log output, option to filter
Use autoconf to find either python3 or python.

Add option to travis to filter the contents of stdout or stderr.

Generate the _version.stdout travis matching file from the version
file.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-08 12:56:00 -07:00
H. Peter Anvin (Intel)
a398a41f0a travis: update AMX test
Update AMX test per previous commit from IntLatx64.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-08 11:59:23 -07:00
InstLatx64
019615f85f AMX fix
-- AMX instruction fixes
-- AMX test file extension with new levels
according to Intel ISA Extension Guide 58th edition

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-08 11:59:23 -07:00
InstLatx64
292d852f55 AVX-NE-CONVERT fix
AVX-NE-CONVERT fix:
- only VCVTNEPS2BF16 has EVEX version
AVX-NE-CONVERT32b/64b test files
Checked with XED version: [v2025.06.08]
2025-10-08 11:51:04 -07:00
Iouri Kharon
5a5057ad95 bug in new macro (typo?): alias is SAL (to SHL), not SAR 2025-10-08 11:49:54 -07:00
H. Peter Anvin (Intel)
e027b5919f NASM 3.01rc6 nasm-3.01rc6 2025-10-07 20:27:43 -07:00
H. Peter Anvin (Intel)
ae9335a0b9 labels: make the prefix/suffix options and pragmas consistent
Make the spellings for the label-mangling options and pragmas
consistent, and implement the directive forms which were documented
but never implemented.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 18:46:39 -07:00
H. Peter Anvin (Intel)
c08b4edca1 Sync builtin.mac 2025-10-07 18:06:34 -07:00
H. Peter Anvin (Intel)
495fd738ec NASM 3.01rc5 nasm-3.01rc5 2025-10-07 16:32:54 -07:00
H. Peter Anvin (Intel)
99df4c97be changes.src: handwavy note about various instruction changes
A lot of minor changes, but not worth enumerating them.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 16:31:43 -07:00
H. Peter Anvin (Intel)
e3f26e25a2 Reshuffle shift and rotate patterns for APX
The shift and rotate patterns are "interesting" in the following way:

1. Even though only 4/5/6 bits of the input are ever used, for the
   regular instructions the input is specified as the CL register, but
   for the -X instructions as a size-matching register. This makes the
   optimization patterns "interesting."

2. The sequencing of legacy, VEX -X versions, APX EVEX, and APX -X

For #1, allow any size register to contain the shift count.

For #2, split up the macro generation of the patterns, and add a new
"$xmacro" macro to deal with the combinatorics of generating all the
-X patterns.  Written directly in Perl since it seemed easier than
trying to make anything more general for what is very much a special
case...

Reported-by: Maciej Wieczor-Retman <maciej.wieczor-retman@intel.com>
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 16:26:09 -07:00
hongjinghao
e39b856bde preproc: fix heap memory overflow CVE-2023-31722
paramlen has heap memory of length nparam+1. The value of variable i
may be greater than nparam+1, causing heap memory overflow. Therefore,
i and nparam+1 needs to be determined in the loop.

Fixes: https://bugzilla.nasm.us/show_bug.cgi?id=3392857#c1
Fixes: https://github.com/netwide-assembler/nasm/pull/83
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 14:58:03 -07:00
H. Peter Anvin (Intel)
c651c28217 NASM 3.01rc4 nasm-3.01rc4 2025-10-07 11:18:18 -07:00
H. Peter Anvin (Intel)
6e221c8193 assemble: reduce the priority of "mask not permitted" error
Per BR 75, the "mask not permitted" error is a little too persistent.

Fixes: https://github.com/netwide-assembler/nasm/pull/75 (hopefully)
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 11:12:43 -07:00
Henrik Gramner
86919accd9 x86/insns.dat: Enable contracted forms for a few EVEX vcvt* instructions
Most instructions support contracted forms, but those had been overlooked.

Signed-off-by: Henrik Gramner <henrik@gramner.com>
[ hpa: manual merge ]
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 11:08:58 -07:00
Henrik Gramner
162d245c30 x86/insns.dat: Fix {er} usage on EVEX vcvtsi2* instructions
The rounding specifier should be applied to src2, not src1.

Furthermore, VCVTSI2SD with a 32-bit source operand does not
support specifying a rounding mode (as no rounding can occur).

Signed-off-by: Henrik Gramner <henrik@gramner.com>
[ hpa: manual merge ]
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 11:06:52 -07:00
H. Peter Anvin (Intel)
0a1a9789ec Fix confusion between "postfix" and "suffix"
"suffix" is the more common English term, but NASM used "postfix" for
a long time.  Allow them as aliases, and tidy up the documentation
accordingly.  While making these changes, tidy up the handling of
options in the index.

Fixes: https://github.com/netwide-assembler/nasm/pull/61
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 10:49:55 -07:00
Iouri Kharon
89439aa58d Remove unneeded (illegal) evex-encoding of VCVTPS2PH
According to the June edition of SDM evex-form of the VCVTPS2PH command only exists with mmmmm equal to 0f38, and map5 only exists for the VCVTPS2PHX command
2025-10-07 10:16:36 -07:00
H. Peter Anvin (Intel)
41d35bb483 Merge multiple fixes from "InstLatx64" 2025-10-07 10:13:12 -07:00
H. Peter Anvin
e72a54174c insns.dat: correct the [LD][GI]DT patterns
It is somewhat counterintuitive, but the correct flag for the memory
operand is "OSIZE". The "nw" flag takes care of promoting the default
operand size on 64 bits to 64.

Fixes: https://github.com/netwide-assembler/nasm/issues/130
Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:58:54 -07:00
H. Peter Anvin
f047ceeae3 test/Makefile: add .bin{16,32,64} targets
Quick and easy way to run the same test for 16-, 32- and 64-bit output
without mixing them together in one binary output file.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:57:19 -07:00
H. Peter Anvin
fa43d8e01d asm: new --bits option to set the processor mode on the command line
This is really just a shorthand for the --before option, but it is
really convenient for quickly writing multimode tests.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:56:20 -07:00
H. Peter Anvin
2c63ab038c asm/preproc.c: generalize pp_pre_command()
Generalize pp_pre_command() so that the first argument doesn't have to
be a preprocessor token. Instead, the two arguments are now both
turned into token streams, separated by a whitespace token.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:53:15 -07:00
H. Peter Anvin
f1b6d3188c preproc: add a %selbits() function
Although one can implement this "manually" in terms of %sel(), this
function is *really* useful for making multi-mode tests and allows for
better error checking.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:17:59 -07:00
H. Peter Anvin
e4044cfc48 assemble.c: avoid a panic after invalid instruction error
If an instruction triggers an error (nasm_nonfatal) it is legitimate
for calcsize() to return 0; in that case no further processing is
needed.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 09:16:06 -07:00
H. Peter Anvin
6df250aee3 parser: add the actual name of a label to the label-orphan warning
The label-orphan warning is *way* more useful if it includes the
actual label name; this way the programmer can usually spot
immediately if it is a label or misspelled instruction.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-10-07 08:30:02 -07:00
Yongjie Sheng
d66187c1de reconstruct ffmpegtest to be generic to support more different projects 2025-10-07 08:11:33 -07:00
InstLatx64
2a2acca7c0 AVX512_VP2INTERSECT test files
AVX512_VP2INTERSECT 32b/64b test files
Checked with XED version: [v2025.06.08]
2025-10-07 12:07:55 +02:00
InstLatx64
f4b1a206e0 Remove duplicates
Remove duplicates:
- V{MAX,MIN}{P,S}H
- VEXTRACT{F,I}{32x4,64x2}
- VF{,C}MULCPH
- VF{,N}M{ADD,SUB}{132,213,231}SH
Removed AVX10_1 label from VADDPH/VCMPPH due to consistency
2025-10-07 11:35:15 +02:00
InstLatx64
fb43244978 KUNPCK* fix
KUNPCK* fix, it compiles k_test.asm without errors
2025-10-07 11:07:33 +02:00