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mirror of https://github.com/netwide-assembler/nasm.git synced 2025-07-24 10:25:42 -04:00

592 Commits

Author SHA1 Message Date
H. Peter Anvin
3d686291c0 assemble: make assemble() and insn_size() static
These functions are only used in assemble.c, so make them static.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2025-03-04 08:38:45 -08:00
H. Peter Anvin
49a56ea9ee Add optimization for operand narrowing; tidy up selector handling
Add a optimization frameword for operand narrowing (where the operand
size doesn't matter beyond a certain range because only certain bits
are referenced.)

Add a macro *and* matching facility for dealing with segment selectors, which are
typically rm16/r32/r64, but exactly how that is applied varies
depending on if a datum is read or written.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2024-08-23 02:25:21 -07:00
H. Peter Anvin
863bddbdcb iflags: add NOREX flag
Add a NOREX flag to indicate that an instruction pattern is not
compatible with REX encoding.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2024-08-22 23:41:32 -07:00
H. Peter Anvin
2b2f1fc98a More macroizing and sorting of instructions into categories
More work on cleaning up instruction patterns, fixing matchig corner
cases, and tidying up the organization of insns.dat.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2024-08-22 23:22:59 -07:00
H. Peter Anvin
e515dac43f More matching/macrofication work; now passes "make travis"
More matching and macrofication work.
Improve some error and warning messages.
Update some travis tests for better messages and added optimizations.

Fix duplicated warning messages for the same out-of-range value
problem.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2024-08-22 22:07:31 -07:00
H. Peter Anvin
253ff4f370 insns: tag pseudo-instructions explicitly; change insnsa.c format
Tag pseudo-instructions explicitly and don't set any CPU level flag
for those.

Change insnsa.c to have (length, pointer) rather than using an ever
increasing in size sentinel at the end of each table. This also means
that empty tables (Dx, INCBIN) can be omitted entirely.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-21 12:50:31 -07:00
H. Peter Anvin
58024b4611 insns: more instruction macroizing/fixups; remote FUTURE tags
Add more instruction macros and fix problems. Adjust some matching
problems.

Remove all FUTURE tags from the instruction list, and add a bunch of
new CPUID tags. Hopefully a small step toward actually getting CPU
feature selection working properly in the future.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-21 11:48:47 -07:00
H. Peter Anvin
75f6f4cdb2 WIP: more matching and template work
Further work on a better matching system. Still a work in progress,
however.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
2024-08-20 12:59:07 -07:00
H. Peter Anvin
f114a6276e insns: more macroization and organization
Macroize and update more instruction patterns.

Begin organizing the instructions by functional groups.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-15 22:15:48 -07:00
H. Peter Anvin
05f1b6b658 insns: sanitize the handling of "nw" and "osz"; fix more patterns
"nw" now means: 64-bit operand size is the default, o32 is not
permitted in 64-bit mode.

"osz" means: instruction size determined by prefixes, otherwise the
mode default.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-15 17:52:54 -07:00
H. Peter Anvin
3b55b62f02 apx: implement the mechanism for evex.zu
Implement the mechanism needed to handle {zu} suffixes that actually
set ND (IMUL, SETcc).

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-14 15:44:38 -07:00
H. Peter Anvin
c9457d42a6 WIP checkpoint: more matching changes, starting to work on patterns
This is a WIP checkpoint; not all tests pass yet.

More matching changes, and hopefully something much closer to what
really is desired now. The number of required patterns is now much
smaller.

However, a lot of *changes* are needed to the patterns.

Since some patterns are repeated all over the place, clean up the
x86/addflags.pl script and make it able to generate macro-based
common patterns; first use being the patterns for the "basic 8"
arithmetic patterns.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-11 21:28:57 -07:00
H. Peter Anvin
f13bad288b assemble.c: set ins->op_size for byte code "osz"
When encountering byte code "osz", set ins->op_size accordingly.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-07 17:33:57 -07:00
H. Peter Anvin
bff94fbd39 Major changes to a number of subsystems to improve matching
Work through a number of changes toward making matching a lot saner,
both to reduce the number of patterns to generate for APX but also to
make a number of code patterns simpler.

This replaces a fair number of byte codes.

Improve a number of error messages, especially related to overflows.

Move process_insn() from nasm.c to assemble.c, as it really is the
primary entry point to the assembler module.

Reorder some prefixes. In particular, F2/F3 override 66 when used as a
mandatory prefix, so it makes more sense for them to be closer to the
opcode.

Move a lot more information into struct insn. It is better to have it
in one place; memory consumption is not an issue because struct insn
is transient information.

Get rid of "optimization levels" and replace it with a mask of
flags. That was already halfway done; complete the job.

Replace seg:offset in struct out_data with a struct location. It would
be better to extend this to more places, too.

The ARx and SMx flags are now explicit bitmasks, instead of having a
couple of hard-coded ranges.

Add __func__ to assert or panic messages.

Because of prefix and message changes, a number of travis tests had to
be audited and updated.

Fix a number of instruction patterns which had .128 when they ought to
be .lig. This is no longer a minor issue with the disassembler: for
AVX10, the pattern vector length determines how SAE/RC are encoded,
and there is no valid 128-bit encoding. However, with .lig the 512-bit
encoding can be used.

Separate "o64nw" into two pieces: opsize 64 and "nw" = "REX.w not necessary". The
latter can be included in non-64-bit patterns. "o64" still set REX.W
since that is still the common thing.

New "osz" bytecode: emit an OSP *or* REX.W depending on the current
mode and operand size. Useful for special cases like "nop" where "o64
nop" probably wants to be encoded as "48 90".

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-07 17:13:44 -07:00
H. Peter Anvin
7eb0045c5d Merge remote-tracking branch 'origin/master' into apx.wip
Resolved Conflicts:
	asm/assemble.c
	asm/parser.c
	include/nasm.h

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-04 23:55:42 -07:00
H. Peter Anvin
86142b00e1 assemble: limit-check operand references
Don't do an out-of-range check for the operands, even
temporarily. Setting the operand pointer to NULL will help catch
errors when accessing non-operands, too.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-04 23:45:20 -07:00
H. Peter Anvin
5225d57cd7 Correctly handle instruction masking based on {zu} flag
Fix instruction masking based on {zu} flag.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-03 18:54:13 -07:00
H. Peter Anvin
1286a2da4e Tidy up handling of modr/m and compressed immediates
Merge a bunch of common code in the handling of modr/m
generation. Make the handing of compressed disp8 simpler and more
transparent by exporting a the shift factor for the compressed
immediate in ea_data. For the case of no compression, the shift factor
is simply 0; there is no need to distinguish "compressed" from
"uncompressed".

The tidied up version of the disp8 code is simple enough that it makes
more sense to inline it.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-08-03 16:24:49 -07:00
H. Peter Anvin
b5e613fdf8 Allow more flexiblity for {nf} and {zu}
The {nf} and {zu} prefixes (or suffixes) can be used on a number of
instructions without actually change the encodings (either they don't
touch the flags at all, or they write a 32- or 64-bit register
already.)

Make this a bit more flexible, by adding an FL instruction flag for
the instructions which actually touch the flags, and a ZU instruction
flag for the instructions which zero the upper half.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-31 17:23:06 -07:00
H. Peter Anvin
dda9152b35 apx: smarter determination of REX2 prefix eligibility
REX2 encoding is mostly default, so flag the instruction patters which
do *not* support REX2 instead.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-31 16:18:17 -07:00
H. Peter Anvin
fd08822070 apx: implement JMPABS
Implement the JMPABS instruction, which can also be specified as JMP
ABS for consistency. Since ABS is already a keyword, this does not
pollute the namespace.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-30 17:32:00 -07:00
H. Peter Anvin
973fe19a1b WIP: apx: now can encode most instructions; handle subcases in EVEX
EVEX encoding is really messy, with the 4th register bit in one of
several places depending on which type of register it is. It seems to
work now.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-30 17:03:58 -07:00
H. Peter Anvin
2e4df506e0 WIP: APX: can now generate code for tested APX instructions
a
Support generating code for APX instruction and add support for the
{nf} prefix.

No disassembler support yet, and only a handful instructions encoded.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-29 20:58:04 -07:00
H. Peter Anvin
f10f278edd nasmlib: add general sign- and zero-extension functions
We use this all over the place, so make these general. The sign
extension function existed as signed_bits(), but that is an awfully
confusing name.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-29 12:54:39 -07:00
H. Peter Anvin
318a0b9244 WIP: apx: byte code and byte code compiler changes
Change the byte code format and the byte code compiler to be able to
generate various kinds of APX-format instructions.

THE NEW BYTE CODES ARE NOT YET IMPLEMENTED IN THE ASSEMBLER OR
DISASSEMBLER.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-28 21:57:31 -07:00
H. Peter Anvin
1618fa745b apx: support parsing special constants like {dfv=}
{dfv=} is basically a constant (immediate). Treat it as such during
parsing, except that if "naked" (not in an expression), it has special
matching properties and does not need a terminal comma.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-28 16:57:24 -07:00
H. Peter Anvin
bdfa9f952d eval: recognize TOKEN_BRCCONST as integers
If TOKEN_BRCCONST are used in an expression (including simply wrapping
them in parentheses), then just treat them as integers.  This makes
things like ({dfv=cf}|{dfv=of}) work.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-27 18:19:35 -07:00
H. Peter Anvin
6389ac8e47 scanner: generalize the handling of {dfv=}
Change the handling of {dfv=} to a more general "braced constant"
expression, to be tagged with an instruction flag to make sure they
match the instruction in question.

This really ought to be an operand flag, but the opflags are precious;
as the CCMP/CTEST instructions can also take an immediate it probably
is necessary to invent a "special immediate" operand type that can
fold these together.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-27 18:06:51 -07:00
H. Peter Anvin
4f0d89dbe6 apx: modify the tokenizer to be able to handle {dfv=...}
The {dfv=} prefix sequences for the CCMP and CTEST instructions need
special handling in the parser. This means a fair bit of new magic in
the handler of the parser, but it just adds to the fun.

Try to make this as general as possible, so we can use it for other
things.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-27 17:57:08 -07:00
H. Peter Anvin
7cc9fc4773 stdscan: abstract out the saving/restoring of parser state
The parser state does not just necessarily include the position of the
buffer, but make it possible to maintain additional state.

Furthermore, add an explicit ability to push back a token.

All of this might make it easier at some point in the future to keep
track of horizontal position, although that will require lots of
changes to the preprocessor.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-24 14:15:35 -07:00
H. Peter Anvin
e03b9325e2 parser: tidy up handling of prefixes; allow braced prefix after insn
Clean up the handling of prefixes in general. Allow a set of braced
prefixes to follow the instruction; this is required for things like
{dfv=} but might also be a nicer syntax for things like {rex}.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-24 13:09:36 -07:00
H. Peter Anvin
49640ed315 x86: move the bytecode defintion into a separate file in x86/
At least three files (asm/assemble.c, disasm/disasm.c, and
x86/insns.pl) depend on the bytecode defintions. It makes a lot more
sense for them to live in an explicit documentation file in the x86/
directory.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-07-23 12:47:25 -07:00
H. Peter Anvin
cd1fd8ac8e nasm.c: tidy up the help text and break it into topics
The help output has gotten way too long to be shown on a single
command line. It can of course be piped to a pager, but to be a little
nicer to the user, break it up into subtopics that can be individually
displayed. --help all (-h all) can still show all the help information
as a single data dump.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-04-25 15:14:20 -07:00
H. Peter Anvin
b11cd3a426 warnings: more improvements to warnings generation
Try to better sort out the necessary dependencies for warning
generation.

Fix regex for cleaning up nasmdoc markup: nasmdoc markup does not
nest, although it may include \} sequences.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-04-04 14:18:34 -07:00
H. Peter Anvin
d55d22996a warnings: strip nasmdoc makeup from help strings
When displaying command line help strings, strip nasmdoc markup.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-04-04 13:25:05 -07:00
H. Peter Anvin
33ef63669c doc: improve some formatting, mostly of the warning list
Fix some formatting markups, especially with regards to warnings.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2024-04-04 12:58:32 -07:00
H. Peter Anvin
7d5e549d63 asm/rdstrnum: always handle 64 bits
We should always support up to 8 characters, i.e. 64 bits, in a
string-to-numeric conversion.

Reported-by: Aleksandras Krupica <vaikutisasa@gmail.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 16:54:11 -07:00
H. Peter Anvin
9f83c383e4 preproc, %map(): require second colon, update documentation
Require the second colon before the grouped parameter count; otherwise
the syntax is ambiguous since an expression can start with (.

Update/complete the documentation and the examples.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 13:42:16 -07:00
H. Peter Anvin
cb96db9b70 preproc: add the ability for %map() to have fixed arguments
Add the ability to have fixed arguments in %map. This is extremely
useful for parameterizing the invoked macro using arguments to a
surrounding macro.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 02:56:13 -07:00
H. Peter Anvin
78bde7562d preproc: factor expand_one_smacro() even more
Separate out counting and parsing smacro parameters into separate
functions. This not only makes the code *way* easier to read, but
these can be re-used e.g. for %map().

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 02:03:56 -07:00
H. Peter Anvin
8584bce804 preproc: handle empty expansion in %map
%map(foo) should expand to the empty string, but instead crashed NASM.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-16 01:24:20 -07:00
H. Peter Anvin
34eefd3803 preproc: add %map() function and radix specifiers
Add the %map() function which can apply arguments to a macro from a
list.

Allow the user to specify the desired radix for an evaluated
parameter. It doesn't make any direct difference, but can be nice for
debugging or turning into strings.

As part of this, split expand_one_smacro() into two parts: parameter
parsing and macro expansion. This is a very straightforward splitting
of two mostly unrelated pieces of functionality.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-15 22:43:28 -07:00
H. Peter Anvin
2e9120e56f BR 3392893: preproc: correctly handle empty %rep blocks
When expanding %rep blocks, if any of the %rep blocks are empty, there
may be need to unwind the %rep stack multiple times. The code would
not do so -- there was a break; in the loop, which incidentally turned
it into something that wasn't a loop at all.

Reported-by: E. C. Maslock <pushbx@ulukai.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-13 20:51:52 -07:00
H. Peter Anvin
dcac46d973 preproc: add options for a base prefix to %num(), add %hex()
Make it possible to add a base prefix to %num().

Add the %hex() function, producing hexadecimal values that are
nevertheless valid NASM numeric constants.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-13 17:50:55 -07:00
H. Peter Anvin
e2dc551796 preproc: fix the parameter number in error messages
The user would generally expect the parameter number to be counted
from 1 for human purposes, and that is also consistent with %1, %2,
... for multi-line macros.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-13 17:21:12 -07:00
H. Peter Anvin
e993b75aa6 XCHG: adjust lock prefix warning, add specific warning for LOCK XCHG
"LOCK XCHG reg,mem" would issue a warning for being unlockable, which
is incorrect. In this case the RM encoding is simply an alias for the
MR encoding. Add a "LOCK1" bit to deal with that.

However, XCHG is *always* locked, so create a new warning to
explicitly flag a user-specified LOCK XCHG; default off.

Consider optimizing that prefix away in the future, but for now, let's
stick to the user-requested code sequence.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-12 14:53:40 -07:00
H. Peter Anvin
03490692b0 BR 3392832: fix dependency list generation
The dependency list needs to be updated for all passes, not just the
last one. The dependency list is already uniquized, so it doesn't
cause problems with multiple entires.

The reasons it needs to be done for all passes is first of all that an
%include could be pass-dependent, and secondly that we only record a
dependency for an %include or %require for the first occurrence of
that file, when pathnames are resolved.

Reported-by <michael@mehlich@com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-11 14:35:49 -07:00
C. Masloch
d48839780d BR 3392892: fix memory leak related to BR 3392414
The fix for BR 3392414 introduced a fairly serious memory
leak. C. Masloch was kind enough to track down the proper root cause
and fix it correctly.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-11 13:58:48 -07:00
H. Peter Anvin
8fc4af0cf9 assemble.c: fix a typo in warning texts
Fix a typo in the help text for the -w+reloc options.

Reported-by: C. Masloch <pushbx@ulukai.org>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-11 13:42:31 -07:00
H. Peter Anvin
2daa5989ab error: macro to bypass disabled warning generation
At least attempt to not spend time generating a warning message that
is just going to be suppressed.

Signed-off-by: H. Peter Anvin <hpa@zytor.com>
2023-10-11 13:35:58 -07:00