travis: unbreak the ret.asm test

The ret.asm test was broken because the assembly expected -DERROR=1
whereas the run script provided -DERROR, masking all the actual
errors...

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>

travis/test/ret-16.stderr

@@ -1 +1,6 @@
-./travis/test/ret.asm:18: error: expression syntax error
+./travis/test/ret.asm:16: error: instruction not supported in 16-bit mode
+./travis/test/ret.asm:17: error: instruction not supported in 16-bit mode
+./travis/test/ret.asm:18: error: instruction not supported in 16-bit mode
+./travis/test/ret.asm:56: error: instruction not supported in 16-bit mode
+./travis/test/ret.asm:57: error: instruction not supported in 16-bit mode
+./travis/test/ret.asm:58: error: instruction not supported in 16-bit mode

travis/test/ret-32.stderr

@@ -1 +1,6 @@
-./travis/test/ret.asm:37: error: expression syntax error
+./travis/test/ret.asm:35: error: instruction not supported in 32-bit mode
+./travis/test/ret.asm:36: error: instruction not supported in 32-bit mode
+./travis/test/ret.asm:37: error: instruction not supported in 32-bit mode
+./travis/test/ret.asm:56: error: instruction not supported in 32-bit mode
+./travis/test/ret.asm:57: error: instruction not supported in 32-bit mode
+./travis/test/ret.asm:58: error: instruction not supported in 32-bit mode

travis/test/ret-64.stderr

@@ -1 +1,2 @@
-./travis/test/ret.asm:53: error: expression syntax error
+./travis/test/ret.asm:51: error: instruction not supported in 64-bit mode
+./travis/test/ret.asm:52: error: instruction not supported in 64-bit mode

travis/test/ret.asm

@@ -1,7 +1,4 @@
 ;; All the flavors of RET
-%ifndef ERROR
-	%define ERROR 0
-%endif
 
 %ifdef TEST_BITS_16
 	bits 16
@@ -15,7 +12,7 @@
 	retd
 	retnd
 	retfd
-%if ERROR
+%ifdef ERROR
 	retq
 	retnq
 	retfq
@@ -34,7 +31,7 @@
 	retd
 	retnd
 	retfd
-%if ERROR
+%ifdef ERROR
 	retq
 	retnq
 	retfq
@@ -50,7 +47,7 @@
 	retw
 	retnw
 	retfw
-%if ERROR
+%ifdef ERROR
 	retd
 	retnd
 %endif