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Fix control/debug register patterns

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The control and debug registers are always using the default operand
size. It is probably easiest to just encode it explicitly for now.

Control registers are particularly weird because of the AMD "lock as
REX.R" hack...

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin
2025-09-19 16:26:35 -07:00
parent b390ce4bb8
commit a0396faf3b
3 changed files with 14 additions and 9 deletions
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9
x86/preinsns.pl
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@@ -204,7 +204,9 @@ sub func_multisize($$$) {
$o .= ',NOLONG' if ($long & 2);
$o .= ',ND' if ($nd);
$o .= ',386' if ($s >= 32 && $o !~ /\B\!386\b/);
if ($s >= 32 && $o !~ /\B\!386\b/ && $o =~ /\b(8086|[12]86)\b/) {
$o .= ',386';
}
push(@ol, $o);
}
@@ -499,10 +501,9 @@ sub adjust_instruction_flags(@) {
return undef;
}
if ($i[2] =~ /\ba16\b/) {
if ($i[2] =~ /\b(a16|rex\.l)\b/) {
add_flag($i[3], 'NOLONG');
}
if ($i[2] =~ /\b(o64(nw)?\b|rex2?|a64\b)/) {
} elsif ($i[2] =~ /\b(o64(nw)?\b|rex2?|a64\b)/) {
add_flag($i[3], 'LONG');
}
if (has_flag($i[3], 'NOLONG') && has_flag($i[3], 'LONG')) {