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Fix control/debug register patterns
The control and debug registers are always using the default operand size. It is probably easiest to just encode it explicitly for now. Control registers are particularly weird because of the AMD "lock as REX.R" hack... Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
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@@ -2343,7 +2343,7 @@ static inline void emit_rex(struct out_data *data, insn *ins)
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} else if (rex & REX_P) {
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buf[n++] = rex;
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} else {
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nasm_assert(!rex);
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nasm_assert(!(rex & ~REX_L));
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}
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if (ins->vex_cm) {
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