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https://github.com/netwide-assembler/nasm.git
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Merge remote-tracking branch 'yongjie/master'
This commit is contained in:
H. Peter Anvin
@@ -42,3 +42,621 @@ testcase { 0x62, 0xb5, 0x7d, 0x08, 0x1d, 0x4c, 0xf0, 0x01
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testcase { 0x62, 0xf5, 0x7d, 0x48, 0x1d, 0xca }, { vcvtps2phx ymm1,zmm2 }
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testcase { 0x62, 0xb5, 0x7d, 0x48, 0x1d, 0x8c, 0xf0, 0x10, 0x00, 0x00, 0x00 }, { vcvtps2phx ymm1,[rax+r14*8+0x10] }
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testcase { 0x62, 0xb5, 0x7d, 0xc9, 0x1d, 0x8c, 0xf0, 0x10, 0x00, 0x00, 0x00 }, { vcvtps2phx ymm1{k1}{z},[rax+r14*8+0x10] }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0xc9 }, { {evex} VADDPH xmm1, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x0f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x1f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x1f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x0f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x1f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x1f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, oword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x8f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x9f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x9f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}{z}, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x8f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}{z}, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x9f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x9f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}{z}, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x08, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0xc9 }, { {evex} VADDPH ymm1, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x28, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x38, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x38, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0xc9 }, { {evex} VADDPH ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0x08 }, { {evex} VADDPH ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x28, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x38, 0x58, 0x08 }, { {evex} VADDPH ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x38, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x18, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x2f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x3f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x3f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x2f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x3f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x3f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x18, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0xaf, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0xbf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0xbf, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}{z}, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0xaf, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}{z}, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0xbf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0xbf, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}{z}, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0xc9 }, { {evex} VADDPH xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0x00 }, { {evex} VADDPH zmm0, zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x48, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x38, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0x00 }, { {evex} VADDPH zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x48, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x38, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}, zmm0, zword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0x08 }, { {evex} VADDPH xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x4f, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x3f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x4f, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x3f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0xcf, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xbf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xb5, 0x74, 0x08, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0xcf, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xbf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x74, 0x18, 0x58, 0x08 }, { {evex} VADDPH xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x18, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0xc9 }, { {evex} VADDPH xmm1, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, oword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x1f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, oword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, oword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x9f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, yword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x38, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x18, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, yword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x3f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, yword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0xbf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0x00 }, { {evex} VADDPH zmm0, zmm0, zword [rax] }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}, zmm0, zword [rax] }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zword [rax] }
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testcase { 0x62, 0xf3, 0x7d, 0x28, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0, ymm1, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x19, 0xcb, 0x55 }, { {evex} VEXTRACTF32X4 [rcx]{k7}, zmm3, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x28, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0, ymm1, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}, ymm1, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}{z}, ymm1, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x48, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0, zmm3, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}, zmm3, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}{z}, zmm3, 0x55 }
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testcase { 0x62, 0xf3, 0x7d, 0x29, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 oword [rax+r14*8]{k1}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x49, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 oword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x19, 0xc9, 0x55 }, { {evex} VEXTRACTF32X4 [rcx], ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x19, 0xc9, 0x55 }, { {evex} VEXTRACTF32X4 [rcx]{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF32X4 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x19, 0xcb, 0x55 }, { {evex} VEXTRACTF32X4 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x1b, 0xcb, 0x55 }, { {evex} VEXTRACTF32X8 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x1b, 0xcb, 0x55 }, { {evex} VEXTRACTF32X8 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x49, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF32X8 yword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x19, 0xcb, 0x55 }, { {evex} VEXTRACTF64X2 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x29, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 oword [rax+r14*8]{k1}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x49, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 oword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x19, 0xc1, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x19, 0xc9, 0x55 }, { {evex} VEXTRACTF64X2 [rcx], ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x19, 0xc9, 0x55 }, { {evex} VEXTRACTF64X2 [rcx]{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x19, 0xc3, 0x55 }, { {evex} VEXTRACTF64X2 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x19, 0xcb, 0x55 }, { {evex} VEXTRACTF64X2 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x1b, 0xcb, 0x55 }, { {evex} VEXTRACTF64X4 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x1b, 0xcb, 0x55 }, { {evex} VEXTRACTF64X4 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x49, 0x1b, 0xc3, 0x55 }, { {evex} VEXTRACTF64X4 yword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x39, 0xcb, 0x55 }, { {evex} VEXTRACTI32X4 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x29, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 oword [rax+r14*8]{k1}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x49, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 oword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x39, 0xc9, 0x55 }, { {evex} VEXTRACTI32X4 [rcx], ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x39, 0xc9, 0x55 }, { {evex} VEXTRACTI32X4 [rcx]{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI32X4 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x39, 0xcb, 0x55 }, { {evex} VEXTRACTI32X4 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x3b, 0xcb, 0x55 }, { {evex} VEXTRACTI32X8 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x3b, 0xcb, 0x55 }, { {evex} VEXTRACTI32X8 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x49, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI32X8 yword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x39, 0xcb, 0x55 }, { {evex} VEXTRACTI64X2 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x29, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 oword [rax+r14*8]{k1}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x49, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 oword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x39, 0xc1, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}{z}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x39, 0xc9, 0x55 }, { {evex} VEXTRACTI64X2 [rcx], ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x39, 0xc9, 0x55 }, { {evex} VEXTRACTI64X2 [rcx]{k7}, ymm1, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x39, 0xc3, 0x55 }, { {evex} VEXTRACTI64X2 xmm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x39, 0xcb, 0x55 }, { {evex} VEXTRACTI64X2 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x3b, 0xcb, 0x55 }, { {evex} VEXTRACTI64X4 [rcx], zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x3b, 0xcb, 0x55 }, { {evex} VEXTRACTI64X4 [rcx]{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0{k7}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 ymm0{k7}{z}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x49, 0x3b, 0xc3, 0x55 }, { {evex} VEXTRACTI64X4 yword [rax+r14*8]{k1}, zmm3, 0x55 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x08, 0xd6, 0xc7 }, { {evex} VFCMULCPH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x8f, 0xd6, 0xc7 }, { {evex} VFCMULCPH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x8f, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x9f, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xd6, 0x77, 0x28, 0xd6, 0xc7 }, { {evex} VFCMULCPH ymm0, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x28, 0xd6, 0x00 }, { {evex} VFCMULCPH ymm0, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x08, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x77, 0x2f, 0xd6, 0xc7 }, { {evex} VFCMULCPH ymm0{k7}, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x2f, 0xd6, 0x00 }, { {evex} VFCMULCPH ymm0{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x77, 0xaf, 0xd6, 0xc7 }, { {evex} VFCMULCPH ymm0{k7}{z}, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0xaf, 0xd6, 0x00 }, { {evex} VFCMULCPH ymm0{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x67, 0x48, 0xd6, 0xc7 }, { {evex} VFCMULCPH zmm0, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x67, 0x48, 0xd6, 0x00 }, { {evex} VFCMULCPH zmm0, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x67, 0x4f, 0xd6, 0xc7 }, { {evex} VFCMULCPH zmm0{k7}, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x67, 0x4f, 0xd6, 0x00 }, { {evex} VFCMULCPH zmm0{k7}, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x18, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xd6, 0x67, 0xcf, 0xd6, 0xc7 }, { {evex} VFCMULCPH zmm0{k7}{z}, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x67, 0xcf, 0xd6, 0x00 }, { {evex} VFCMULCPH zmm0{k7}{z}, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x0f, 0xd6, 0xc7 }, { {evex} VFCMULCPH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x0f, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x77, 0x1f, 0xd6, 0x00 }, { {evex} VFCMULCPH xmm0{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x99, 0xc7 }, { {evex} VFMADD132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x99, 0x00 }, { {evex} VFMADD132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x99, 0xc7 }, { {evex} VFMADD132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x99, 0x00 }, { {evex} VFMADD132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x99, 0xc7 }, { {evex} VFMADD132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x99, 0x00 }, { {evex} VFMADD132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xa9, 0xc7 }, { {evex} VFMADD213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xa9, 0x00 }, { {evex} VFMADD213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xa9, 0xc7 }, { {evex} VFMADD213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xa9, 0x00 }, { {evex} VFMADD213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xa9, 0xc7 }, { {evex} VFMADD213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xa9, 0x00 }, { {evex} VFMADD213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xb9, 0xc7 }, { {evex} VFMADD231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xb9, 0x00 }, { {evex} VFMADD231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xb9, 0xc7 }, { {evex} VFMADD231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xb9, 0x00 }, { {evex} VFMADD231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xb9, 0xc7 }, { {evex} VFMADD231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xb9, 0x00 }, { {evex} VFMADD231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x9b, 0xc7 }, { {evex} VFMSUB132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x9b, 0x00 }, { {evex} VFMSUB132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xab, 0xc7 }, { {evex} VFMSUB213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xab, 0x00 }, { {evex} VFMSUB213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xbb, 0xc7 }, { {evex} VFMSUB231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xbb, 0x00 }, { {evex} VFMSUB231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x08, 0xd6, 0xc7 }, { {evex} VFMULCPH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x8f, 0xd6, 0xc7 }, { {evex} VFMULCPH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x8f, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x9f, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xd6, 0x76, 0x28, 0xd6, 0xc7 }, { {evex} VFMULCPH ymm0, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x28, 0xd6, 0x00 }, { {evex} VFMULCPH ymm0, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x08, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x76, 0x2f, 0xd6, 0xc7 }, { {evex} VFMULCPH ymm0{k7}, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x2f, 0xd6, 0x00 }, { {evex} VFMULCPH ymm0{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x76, 0xaf, 0xd6, 0xc7 }, { {evex} VFMULCPH ymm0{k7}{z}, ymm1, ymm15 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0xaf, 0xd6, 0x00 }, { {evex} VFMULCPH ymm0{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x66, 0x48, 0xd6, 0xc7 }, { {evex} VFMULCPH zmm0, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x66, 0x48, 0xd6, 0x00 }, { {evex} VFMULCPH zmm0, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xd6, 0x66, 0x4f, 0xd6, 0xc7 }, { {evex} VFMULCPH zmm0{k7}, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x66, 0x4f, 0xd6, 0x00 }, { {evex} VFMULCPH zmm0{k7}, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x18, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xd6, 0x66, 0xcf, 0xd6, 0xc7 }, { {evex} VFMULCPH zmm0{k7}{z}, zmm3, zmm15 }
|
||||
testcase { 0x62, 0xf6, 0x66, 0xcf, 0xd6, 0x00 }, { {evex} VFMULCPH zmm0{k7}{z}, zmm3, zword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x0f, 0xd6, 0xc7 }, { {evex} VFMULCPH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x0f, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf6, 0x76, 0x1f, 0xd6, 0x00 }, { {evex} VFMULCPH xmm0{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x9d, 0xc7 }, { {evex} VFNMADD132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x9d, 0x00 }, { {evex} VFNMADD132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x9d, 0xc7 }, { {evex} VFNMADD132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x9d, 0x00 }, { {evex} VFNMADD132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x9d, 0xc7 }, { {evex} VFNMADD132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x9d, 0x00 }, { {evex} VFNMADD132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xad, 0xc7 }, { {evex} VFNMADD213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xad, 0x00 }, { {evex} VFNMADD213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xad, 0xc7 }, { {evex} VFNMADD213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xad, 0x00 }, { {evex} VFNMADD213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xad, 0xc7 }, { {evex} VFNMADD213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xad, 0x00 }, { {evex} VFNMADD213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xbd, 0xc7 }, { {evex} VFNMADD231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xbd, 0x00 }, { {evex} VFNMADD231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xbd, 0xc7 }, { {evex} VFNMADD231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xbd, 0x00 }, { {evex} VFNMADD231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xbd, 0xc7 }, { {evex} VFNMADD231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xbd, 0x00 }, { {evex} VFNMADD231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0x9f, 0xc7 }, { {evex} VFNMSUB132SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0x9f, 0x00 }, { {evex} VFNMSUB132SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xaf, 0xc7 }, { {evex} VFNMSUB213SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xaf, 0x00 }, { {evex} VFNMSUB213SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x08, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x08, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x0f, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x0f, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf6, 0x75, 0x8f, 0xbf, 0xc7 }, { {evex} VFNMSUB231SH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf6, 0x75, 0x8f, 0xbf, 0x00 }, { {evex} VFNMSUB231SH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x28, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0xcf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}{z}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x65, 0xcf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}{z}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x28, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0x28, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x2f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0x2f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x75, 0x28, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xaf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}{z}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0xaf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}{z}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x48, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0x48, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x4f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0x4f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x2f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xcf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}{z}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x6d, 0xcf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}{z}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x75, 0x2f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0xaf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}{z}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x75, 0xaf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 ymm0{k7}{z}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x48, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x65, 0x48, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x4f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0x65, 0x4f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF32X4 zmm0{k7}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF32X8 zmm0, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF32X8 zmm0{k7}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF32X8 zmm0{k7}{z}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF32X8 zmm0{k7}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF32X8 zmm0{k7}{z}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF32X8 zmm0, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x28, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0xcf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}{z}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xe5, 0xcf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}{z}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x28, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0x28, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x2f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0x2f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xf5, 0x28, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xaf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}{z}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0xaf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}{z}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x48, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0x48, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x4f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0x4f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x2f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xcf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}{z}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xed, 0xcf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}{z}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xf5, 0x2f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0xaf, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}{z}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xf5, 0xaf, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 ymm0{k7}{z}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x48, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xe5, 0x48, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x4f, 0x18, 0xc5, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xb3, 0xe5, 0x4f, 0x18, 0x04, 0xf0, 0x55 }, { {evex} VINSERTF64X2 zmm0{k7}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF64X4 zmm0, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF64X4 zmm0{k7}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF64X4 zmm0{k7}{z}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF64X4 zmm0{k7}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x1a, 0xc3, 0x00 }, { {evex} VINSERTF64X4 zmm0{k7}{z}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x1a, 0xc2, 0x00 }, { {evex} VINSERTF64X4 zmm0, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}{z}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}{z}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x28, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}{z}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}{z}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}{z}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}{z}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x2f, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}{z}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xaf, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI32X4 ymm0{k7}{z}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI32X4 zmm0{k7}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI32X8 zmm0, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI32X8 zmm0{k7}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI32X8 zmm0{k7}{z}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x4f, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI32X8 zmm0{k7}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0xcf, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI32X8 zmm0{k7}{z}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x7d, 0x48, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI32X8 zmm0, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}{z}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}{z}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x28, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}{z}, ymm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}{z}, ymm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}{z}, zmm2, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x38, 0xc2, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}{z}, zmm2, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x2f, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}{z}, ymm1, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xaf, 0x38, 0xc1, 0x00 }, { {evex} VINSERTI64X2 ymm0{k7}{z}, ymm1, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}, zmm3, xmm5, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x38, 0xc3, 0x00 }, { {evex} VINSERTI64X2 zmm0{k7}, zmm3, oword [rax+r14*8], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI64X4 zmm0, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI64X4 zmm0{k7}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI64X4 zmm0{k7}{z}, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x4f, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI64X4 zmm0{k7}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0xcf, 0x3a, 0xc3, 0x00 }, { {evex} VINSERTI64X4 zmm0{k7}{z}, zmm3, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xfd, 0x48, 0x3a, 0xc2, 0x00 }, { {evex} VINSERTI64X4 zmm0, zmm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x08, 0x5f, 0xc7 }, { {evex} VMAXSH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x08, 0x5f, 0x00 }, { {evex} VMAXSH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x0f, 0x5f, 0xc7 }, { {evex} VMAXSH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x0f, 0x5f, 0x00 }, { {evex} VMAXSH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x8f, 0x5f, 0xc7 }, { {evex} VMAXSH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x8f, 0x5f, 0x00 }, { {evex} VMAXSH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x08, 0x5d, 0xc7 }, { {evex} VMINSH xmm0, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x08, 0x5d, 0x00 }, { {evex} VMINSH xmm0, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x0f, 0x5d, 0xc7 }, { {evex} VMINSH xmm0{k7}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x0f, 0x5d, 0x00 }, { {evex} VMINSH xmm0{k7}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xf5, 0x76, 0x8f, 0x5d, 0xc7 }, { {evex} VMINSH xmm0{k7}{z}, xmm1, xmm7 }
|
||||
testcase { 0x67, 0x62, 0xf5, 0x76, 0x8f, 0x5d, 0x00 }, { {evex} VMINSH xmm0{k7}{z}, xmm1, word [eax] }
|
||||
testcase { 0x62, 0xd3, 0x75, 0x28, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x75, 0xaf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}{z}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0xaf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}{z}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0x48, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x48, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x28, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0x4f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x4f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0xcf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}{z}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0xcf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}{z}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x28, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x28, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x2f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x2f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0xaf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}{z}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xaf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}{z}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x75, 0x2f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x48, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x48, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x2f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 ymm0{k7}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x4f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x4f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0xcf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}{z}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xcf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF32X4 zmm0{k7}{z}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0x28, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0xaf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0xaf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0xbf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0x48, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x48, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x58, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x28, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0x4f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x4f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x5f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0xcf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0xcf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0xdf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x28, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x28, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x38, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x38, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x2f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x2f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x3f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0xaf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xaf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xbf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}{z}, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0x2f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x48, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x48, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x58, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x2f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x4f, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x4f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x5f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0xcf, 0x23, 0xc7, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xcf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xdf, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 zmm0{k7}{z}, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x3f, 0x23, 0x00, 0x55 }, { {evex} VSHUFF64X2 ymm0{k7}, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x75, 0x28, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x75, 0xaf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}{z}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0xaf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}{z}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0x48, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x48, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x28, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0x4f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0x4f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x65, 0xcf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}{z}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x65, 0xcf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}{z}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x28, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x28, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x2f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x2f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0xaf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}{z}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xaf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}{z}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x75, 0x2f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x48, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x48, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x75, 0x2f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 ymm0{k7}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0x4f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0x4f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0x6d, 0xcf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}{z}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0x6d, 0xcf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI32X4 zmm0{k7}{z}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0x28, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0xaf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0xaf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0xbf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0x48, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x48, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x58, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x28, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0x4f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x4f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0x5f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xe5, 0xcf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm3, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0xcf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm3, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xe5, 0xdf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm3, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x28, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x28, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x38, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x38, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x2f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x2f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x3f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0xaf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm2, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xaf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm2, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xbf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}{z}, ymm2, qword [rax]{1to4}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xf5, 0x2f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm1, ymm15, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x48, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x48, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x58, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x2f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm1, yword [rax], 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0x4f, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x4f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0x5f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xd3, 0xed, 0xcf, 0x43, 0xc7, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm2, zmm15, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xcf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm2, zword [rax], 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xed, 0xdf, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 zmm0{k7}{z}, zmm2, qword [rax]{1to8}, 0x55 }
|
||||
testcase { 0x62, 0xf3, 0xf5, 0x3f, 0x43, 0x00, 0x55 }, { {evex} VSHUFI64X2 ymm0{k7}, ymm1, qword [rax]{1to4}, 0x55 }
|
||||
|
||||
Binary file not shown.
@@ -229,6 +229,816 @@ testcase { 0x62, 0xf2, 0x6c, 0x48, 0x50, 0xcb
|
||||
testcase { 0x62, 0xf2, 0x6c, 0x08, 0x51, 0xcb }, { VPDPBUUDS xmm1, xmm2, xmm3 }
|
||||
testcase { 0x62, 0xf2, 0x6c, 0x28, 0x51, 0xcb }, { VPDPBUUDS ymm1, ymm2, ymm3 }
|
||||
testcase { 0x62, 0xf2, 0x6c, 0x48, 0x51, 0xcb }, { VPDPBUUDS zmm1, zmm2, zmm3 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x28, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x38, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x08, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x48, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x58, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x18, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7e, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7e, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWSUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x76, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x76, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWSUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7d, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7d, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUSDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x75, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x75, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUSDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0xc9 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd2, 0x08 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0xc1 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd2, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd2, 0x00 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd2, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUD zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0xc9 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd2, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd2, 0x08 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd2, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUD xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x8f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x8f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x9f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x9f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}{z}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x28, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x28, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x38, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x38, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x08, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x2f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x2f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x3f, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x3f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0xc9 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, ymm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xaf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xaf, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0xbf, 0xd3, 0x08 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rax]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0xbf, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS ymm1{k7}{z}, ymm1, dword [rbp+r14*2+0x8]{1to8} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x08, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x48, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x48, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x58, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x58, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x4f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x4f, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0x5f, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0x5f, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x18, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0xc1 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zmm1 }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xcf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xcf, 0xd3, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x7c, 0xdf, 0xd3, 0x00 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rax]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x7c, 0xdf, 0xd3, 0x44, 0x75, 0x02 }, { {evex} VPDPWUUDS zmm0{k7}{z}, zmm0, dword [rbp+r14*2+0x8]{1to16} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x18, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0xc9 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, xmm1 }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x0f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rax] }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x0f, 0xd3, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
|
||||
testcase { 0x62, 0xf2, 0x74, 0x1f, 0xd3, 0x08 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rax]{1to4} }
|
||||
testcase { 0x62, 0xb2, 0x74, 0x1f, 0xd3, 0x4c, 0x75, 0x02 }, { {evex} VPDPWUUDS xmm1{k7}, xmm1, dword [rbp+r14*2+0x8]{1to4} }
|
||||
testcase { 0x62, 0xf6, 0x7c, 0x08, 0x4c, 0xca }, { VRCPBF16 xmm1, xmm2 }
|
||||
testcase { 0x62, 0xf6, 0x7c, 0x28, 0x4c, 0xca }, { VRCPBF16 ymm1, ymm2 }
|
||||
testcase { 0x62, 0xf6, 0x7c, 0x48, 0x4c, 0xca }, { VRCPBF16 zmm1, zmm2 }
|
||||
|
||||
Binary file not shown.
@@ -172,6 +172,7 @@ if_("HSM4", "SM4 hash instructions");
|
||||
if_("APX", "Advanced Performance Extensions (APX)");
|
||||
if_("AVX10_1", "AVX 10.1 instructions");
|
||||
if_("AVX10_2", "AVX 10.2 instructions");
|
||||
if_("AVX10_VNNIINT", "AVX Vector Neural Network integer instructions");
|
||||
if_("ADX", "ADCX and ADOX instructions");
|
||||
if_("PKU", "Protection key for user mode");
|
||||
if_("MONITOR", "MONITOR and MWAIT");
|
||||
|
||||
214
x86/insns.dat
214
x86/insns.dat
@@ -170,7 +170,7 @@ $wdq BT rm#,imm8 [mi: o# 0f ba /4 ib,u] 386
|
||||
$wdq BTC rm#,reg# [mr: o# 0f bb /r] 386,SM,LOCK
|
||||
$wdq BTC rm#,imm8 [mi: o# 0f ba /7 ib,u] 386,LOCK
|
||||
$wdq BTR rm#,reg# [mr: o# 0f b3 /r] 386,SM,LOCK
|
||||
$wdq BTR rm#,imm8 [mi: o# 0f ab /6 ib,u] 386,LOCK
|
||||
$wdq BTR rm#,imm8 [mi: o# 0f ba /6 ib,u] 386,LOCK
|
||||
$wdq BTC rm#,reg# [mr: o# 0f ab /r] 386,SM,LOCK
|
||||
$wdq BTC rm#,imm8 [mi: o# 0f ba /5 ib,u] 386,LOCK
|
||||
|
||||
@@ -2255,6 +2255,90 @@ VPCLMULLQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r
|
||||
VPCLMULHQHQDQ zmmreg,zmmreg*,zmmrm512 [rvm:fv: evex.nds.512.66.0f3a.wig 44 /r 11] AVX512,VPCLMULQDQ
|
||||
VPCLMULQDQ zmmreg,zmmreg*,zmmrm512,imm8 [rvmi:fv: evex.nds.512.66.0f3a.wig 44 /r ib] AVX512,VPCLMULQDQ
|
||||
|
||||
VEXTRACTF32X4 xmmrm128|mask|z,ymmreg,imm8 [rmi:t4: evex.256.66.0f3a.w0 19 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VEXTRACTF32X4 xmmrm128|mask|z,zmmreg,imm8 [rmi:t4: evex.512.66.0f3a.w0 19 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VEXTRACTF64X2 xmmrm128|mask|z,ymmreg,imm8 [rmi:t2: evex.256.66.0f3a.w1 19 /r ib ] AVX512VL,AVX512DQ,AVX10_1
|
||||
VEXTRACTF64X2 xmmrm128|mask|z,zmmreg,imm8 [rmi:t2: evex.512.66.0f3a.w1 19 /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VEXTRACTF32X8 ymmrm256|mask|z,zmmreg,imm8 [rmi:t8: evex.512.66.0f3a.w0 1b /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VEXTRACTF64X4 ymmrm256|mask|z,zmmreg,imm8 [rmi:t4: evex.512.66.0f3a.w1 1b /r ib ] AVX512F,AVX10_1
|
||||
|
||||
|
||||
VEXTRACTI32X4 xmmrm128|mask|z,ymmreg,imm8 [rmi:t4: evex.256.66.0f3a.w0 39 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VEXTRACTI32X4 xmmrm128|mask|z,zmmreg,imm8 [rmi:t4: evex.512.66.0f3a.w0 39 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VEXTRACTI64X2 xmmrm128|mask|z,ymmreg,imm8 [rmi:t2: evex.256.66.0f3a.w1 39 /r ib ] AVX512VL,AVX512DQ,AVX10_1
|
||||
VEXTRACTI64X2 xmmrm128|mask|z,zmmreg,imm8 [rmi:t2: evex.512.66.0f3a.w1 39 /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VEXTRACTI32X8 ymmrm256|mask|z,zmmreg,imm8 [rmi:t8: evex.512.66.0f3a.w0 3b /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VEXTRACTI64X4 ymmrm256|mask|z,zmmreg,imm8 [rmi:t4: evex.512.66.0f3a.w1 3b /r ib ] AVX512F,AVX10_1
|
||||
|
||||
|
||||
VFCMULCPH xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.map6.w0 d6 /r ] AVX512FP16,AVX512VL,AVX10_1
|
||||
VFCMULCPH ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.map6.w0 d6 /r ] AVX512FP16,AVX512VL,AVX10_1
|
||||
VFCMULCPH zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.map6.w0 d6 /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VFMULCPH xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.map6.w0 d6 /r ] AVX512FP16,AVX512VL,AVX10_1
|
||||
VFMULCPH ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.map6.w0 d6 /r ] AVX512FP16,AVX512VL,AVX10_1
|
||||
VFMULCPH zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.map6.w0 d6 /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VFMADD132SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 99 /r ] AVX512FP16,AVX10_1
|
||||
VFMADD213SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 a9 /r ] AVX512FP16,AVX10_1
|
||||
VFMADD231SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 b9 /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VFNMADD132SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 9d /r ] AVX512FP16,AVX10_1
|
||||
VFNMADD213SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 ad /r ] AVX512FP16,AVX10_1
|
||||
VFNMADD231SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 bd /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VFMSUB132SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 9b /r ] AVX512FP16,AVX10_1
|
||||
VFMSUB213SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 ab /r ] AVX512FP16,AVX10_1
|
||||
VFMSUB231SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 bb /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VFNMSUB132SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 9f /r ] AVX512FP16,AVX10_1
|
||||
VFNMSUB213SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 af /r ] AVX512FP16,AVX10_1
|
||||
VFNMSUB231SH xmmreg|mask|z,xmmreg,xmmrm16|er [rvm:t1s: evex.lig.66.map6.w0 bf /r ] AVX512FP16,AVX10_1
|
||||
|
||||
|
||||
VINSERTF32X4 ymmreg|mask|z,ymmreg,xmmrm128,imm8 [rvmi:t4: evex.256.66.0f3a.w0 18 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VINSERTF32X4 zmmreg|mask|z,zmmreg,xmmrm128,imm8 [rvmi:t4: evex.512.66.0f3a.w0 18 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VINSERTF64X2 ymmreg|mask|z,ymmreg,xmmrm128,imm8 [rvmi:t2: evex.256.66.0f3a.w1 18 /r ib ] AVX512VL,AVX512DQ,AVX10_1
|
||||
VINSERTF64X2 zmmreg|mask|z,zmmreg,xmmrm128,imm8 [rvmi:t2: evex.512.66.0f3a.w1 18 /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VINSERTF32X8 zmmreg|mask|z,zmmreg,ymmrm256,imm8 [rmi:t8: evex.512.66.0f3a.w0 1a /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VINSERTF64X4 zmmreg|mask|z,zmmreg,ymmrm256,imm8 [rmi:t4: evex.512.66.0f3a.w1 1a /r ib ] AVX512F,AVX10_1
|
||||
|
||||
|
||||
VINSERTI32X4 ymmreg|mask|z,ymmreg,xmmrm128,imm8 [rmi:t4: evex.256.66.0f3a.w0 38 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VINSERTI32X4 zmmreg|mask|z,zmmreg,xmmrm128,imm8 [rmi:t4: evex.512.66.0f3a.w0 38 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VINSERTI64X2 ymmreg|mask|z,ymmreg,xmmrm128,imm8 [rmi:t2: evex.256.66.0f3a.w1 38 /r ib ] AVX512VL,AVX512DQ,AVX10_1
|
||||
VINSERTI64X2 zmmreg|mask|z,zmmreg,xmmrm128,imm8 [rmi:t2: evex.512.66.0f3a.w1 38 /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VINSERTI32X8 zmmreg|mask|z,zmmreg,ymmrm256,imm8 [rmi:t8: evex.512.66.0f3a.w0 3a /r ib ] AVX512DQ,AVX10_1
|
||||
|
||||
VINSERTI64X4 zmmreg|mask|z,zmmreg,ymmrm256,imm8 [rmi:t4: evex.512.66.0f3a.w1 3a /r ib ] AVX512F,AVX10_1
|
||||
|
||||
|
||||
VMAXSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5f /r ] AVX512FP16,AVX10_1
|
||||
VMINSH xmmreg|mask|z,xmmreg,xmmrm16|sae [rvm:t1s: evex.lig.f3.map5.w0 5d /r ] AVX512FP16,AVX10_1
|
||||
|
||||
VSHUFF32X4 ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.256.66.0f3a.w0 23 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VSHUFF32X4 zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.512.66.0f3a.w0 23 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VSHUFF64X2 ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.256.66.0f3a.w1 23 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VSHUFF64X2 zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.512.66.0f3a.w1 23 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VSHUFI32X4 ymmreg|mask|z,ymmreg,ymmrm256|b32,imm8 [rvmi:fv: evex.256.66.0f3a.w0 43 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VSHUFI32X4 zmmreg|mask|z,zmmreg,zmmrm512|b32,imm8 [rvmi:fv: evex.512.66.0f3a.w0 43 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
VSHUFI64X2 ymmreg|mask|z,ymmreg,ymmrm256|b64,imm8 [rvmi:fv: evex.256.66.0f3a.w1 43 /r ib ] AVX512VL,AVX512F,AVX10_1
|
||||
VSHUFI64X2 zmmreg|mask|z,zmmreg,zmmrm512|b64,imm8 [rvmi:fv: evex.512.66.0f3a.w1 43 /r ib ] AVX512F,AVX10_1
|
||||
|
||||
;# Intel Fused Multiply-Add instructions (FMA)
|
||||
VFMADD132PS xmmreg,xmmreg,xmmrm128 [rvm: vex.dds.128.66.0f38.w0 98 /r] FMA
|
||||
VFMADD132PS ymmreg,ymmreg,ymmrm256 [rvm: vex.dds.256.66.0f38.w0 98 /r] FMA
|
||||
@@ -3022,7 +3106,7 @@ $k $bwdq KNOT% kreg#,kreg#* [rm: vex+.l0.0f.ko# 44 /r ]
|
||||
$k $bwdq KOR% kreg#,kreg#*,kreg# [rvm: vex+.nds.l1.0f.ko# 45 /r ] AVX512(b:DQ/w:F/BW),SM
|
||||
$k $bwdq KORTEST% kreg#,kreg# [rm: vex+.l0.0f.ko# 98 /r ] AVX512(b:DQ/w:F/BW),SM,FL
|
||||
$k $bwdq KSHIFTL% kreg#,kreg#,imm8 [rmi: vex+.l0.66.0f3a.w## 32## /r ib ] AVX512(b:DQ/w:F/BW),SM0-1
|
||||
$k $bwdq KSHIFTR% kreg#,kreg#,imm8 [rmi: vex+.l0.66.0f3a.w## 32## /r ib ] AVX512(b:DQ/w:F/BW),SM0-1
|
||||
$k $bwdq KSHIFTR% kreg#,kreg#,imm8 [rmi: vex+.l0.66.0f3a.w## 30## /r ib ] AVX512(b:DQ/w:F/BW),SM0-1
|
||||
$k $bwdq KTEST% kreg#,kreg# [rm: vex+.l0.0f.ko# 99 /r ] AVX512(bw:DQ/BW),SM,FL
|
||||
$k $wdq KUNPCK%% kreg#,kreg##*,kreg## [rvm: vex+.nds.l1.0f.ko# 4b /r ] AVX512(w:F/BW),SM1-2
|
||||
$k $bwdq KXNOR% kreg#,kreg#*,kreg# [rvm: vex+.nds.l1.0f.ko# 46 /r ] AVX512(b:DQ/w:F/BW),SM
|
||||
@@ -5347,13 +5431,13 @@ TILELOADDRS tmmreg,mem [rm: vex+.128.f2.0f38.w0 4a /r] APX,AMXTILE,FUTURE,MIB
|
||||
TILELOADDRST1 tmmreg,mem [rm: vex+.128.66.0f38.w0 4a /r] APX,AMXTILE,FUTURE,MIB,SIB,ANYSIZE,AR1,LONG
|
||||
|
||||
;# Intel AVX512-FP16 instructions
|
||||
VADDPH xmmreg|mask|z,xmmreg*,xmmrm16|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL
|
||||
VADDPH ymmreg|mask|z,ymmreg*,ymmrm16|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r] AVX512FP16,AVX512VL
|
||||
VADDPH zmmreg|mask|z,zmmreg*,zmmrm16|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r] AVX512FP16
|
||||
VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL,AVX10_1
|
||||
VADDPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r] AVX512FP16,AVX512VL,AVX10_1
|
||||
VADDPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r] AVX512FP16,AVX10_1
|
||||
VADDSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.f3.map5.w0 58 /r] AVX512FP16
|
||||
VCMPPH kreg|mask,xmmreg*,xmmrm16|b16,imm8 [rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL
|
||||
VCMPPH kreg|mask,ymmreg*,ymmrm16|b16,imm8 [rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL
|
||||
VCMPPH kreg|mask,zmmreg*,zmmrm16|b16|sae,imm8 [rvmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib] AVX512FP16
|
||||
VCMPPH kreg|mask,xmmreg*,xmmrm128|b16,imm8 [rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL,AVX10_1
|
||||
VCMPPH kreg|mask,ymmreg*,ymmrm256|b16,imm8 [rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL,AVX10_1
|
||||
VCMPPH kreg|mask,zmmreg*,zmmrm512|b16|sae,imm8 [rvmi:fv: evex.nds.512.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX10_1
|
||||
VCMPSH kreg|mask,xmmreg*,xmmrm16|sae,imm8 [rvmi:t1s: evex.nds.lig.f3.0f3a.w0 C2 /r ib] AVX512FP16
|
||||
VCOMISH xmmreg,xmmrm16|sae [rm:fv: evex.lig.np.map5.w0 2F /r] AVX512FP16
|
||||
VCVTDQ2PH xmmreg|mask|z,xmmrm128|b32 [rm:fv: evex.128.np.map5.w0 5B /r] AVX512FP16,AVX512VL
|
||||
@@ -5501,15 +5585,24 @@ VPMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.
|
||||
VPMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b8 /r] AVX512FP16,AVX512VL
|
||||
VPMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b8 /r] AVX512FP16,AVX512VL
|
||||
VPMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b8 /r] AVX512FP16
|
||||
VFMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9c /r] AVX512FP16,AVX512VL
|
||||
VFMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9c /r] AVX512FP16,AVX512VL
|
||||
VFMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9c /r] AVX512FP16
|
||||
VFMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ac /r] AVX512FP16,AVX512VL
|
||||
VFMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ac /r] AVX512FP16,AVX512VL
|
||||
VFMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ac /r] AVX512FP16
|
||||
VFMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 bc /r] AVX512FP16,AVX512VL
|
||||
VFMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 bc /r] AVX512FP16,AVX512VL
|
||||
VFMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 bc /r] AVX512FP16
|
||||
VFMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 98 /r] AVX512FP16,AVX512VL
|
||||
VFMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 98 /r] AVX512FP16,AVX512VL
|
||||
VFMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 98 /r] AVX512FP16
|
||||
VFMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 a8 /r] AVX512FP16,AVX512VL
|
||||
VFMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 a8 /r] AVX512FP16,AVX512VL
|
||||
VFMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 a8 /r] AVX512FP16
|
||||
VFMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 b8 /r] AVX512FP16,AVX512VL
|
||||
VFMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 b8 /r] AVX512FP16,AVX512VL
|
||||
VFMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 b8 /r] AVX512FP16
|
||||
VFNMADD132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9c /r] AVX512FP16,AVX512VL
|
||||
VFNMADD132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9c /r] AVX512FP16,AVX512VL
|
||||
VFNMADD132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9c /r] AVX512FP16
|
||||
VFNMADD213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ac /r] AVX512FP16,AVX512VL
|
||||
VFNMADD213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ac /r] AVX512FP16,AVX512VL
|
||||
VFNMADD213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ac /r] AVX512FP16
|
||||
VFNMADD231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 bc /r] AVX512FP16,AVX512VL
|
||||
VFNMADD231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 bc /r] AVX512FP16,AVX512VL
|
||||
VFNMADD231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 bc /r] AVX512FP16
|
||||
VPMADD132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 99 /r] AVX512FP16
|
||||
VPMADD213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 a9 /r] AVX512FP16
|
||||
VPMADD231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 b9 /r] AVX512FP16
|
||||
@@ -5525,15 +5618,24 @@ VPMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.
|
||||
VPMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ba /r] AVX512FP16,AVX512VL
|
||||
VPMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ba /r] AVX512FP16,AVX512VL
|
||||
VPMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ba /r] AVX512FP16
|
||||
VFMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9e /r] AVX512FP16,AVX512VL
|
||||
VFMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9e /r] AVX512FP16,AVX512VL
|
||||
VFMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9e /r] AVX512FP16
|
||||
VFMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ae /r] AVX512FP16,AVX512VL
|
||||
VFMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ae /r] AVX512FP16,AVX512VL
|
||||
VFMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ae /r] AVX512FP16
|
||||
VFMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 be /r] AVX512FP16,AVX512VL
|
||||
VFMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 be /r] AVX512FP16,AVX512VL
|
||||
VFMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 be /r] AVX512FP16
|
||||
VFMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9a /r] AVX512FP16,AVX512VL
|
||||
VFMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9a /r] AVX512FP16,AVX512VL
|
||||
VFMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9a /r] AVX512FP16
|
||||
VFMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 aa /r] AVX512FP16,AVX512VL
|
||||
VFMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 aa /r] AVX512FP16,AVX512VL
|
||||
VFMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 aa /r] AVX512FP16
|
||||
VFMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ba /r] AVX512FP16,AVX512VL
|
||||
VFMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ba /r] AVX512FP16,AVX512VL
|
||||
VFMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ba /r] AVX512FP16
|
||||
VFNMSUB132PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 9e /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB132PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 9e /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB132PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 9e /r] AVX512FP16
|
||||
VFNMSUB213PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 ae /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB213PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 ae /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB213PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 ae /r] AVX512FP16
|
||||
VFNMSUB231PH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.66.map6.w0 be /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB231PH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.66.map6.w0 be /r] AVX512FP16,AVX512VL
|
||||
VFNMSUB231PH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.66.map6.w0 be /r] AVX512FP16
|
||||
VPMSUB132SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 9b /r] AVX512FP16
|
||||
VPMSUB213SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 ab /r] AVX512FP16
|
||||
VPMSUB231SH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.66.map6.w0 bb /r] AVX512FP16
|
||||
@@ -5548,9 +5650,9 @@ VGETEXPPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.66.map6.w0 42 /r] AVX512F
|
||||
VGETEXPPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.66.map6.w0 42 /r] AVX512FP16,AVX512VL
|
||||
VGETEXPPH zmmreg|mask|z,zmmrm512|b16|sae [rm:fv: evex.512.66.map6.w0 42 /r] AVX512FP16
|
||||
VGETEXPSH xmmreg|mask|z,xmmrm16|sae [rm:t1s: evex.128.66.map6.w0 43 /r] AVX512FP16
|
||||
VGETMANTPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 25 /r ib] AVX512FP16,AVX512VL
|
||||
VGETMANTPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 25 /r ib] AVX512FP16,AVX512VL
|
||||
VGETMANTPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 25 /r ib] AVX512FP16
|
||||
VGETMANTPH xmmreg|mask|z,xmmrm128|b16,imm8 [rmi:fv: evex.128.np.0f3a.w0 26 /r ib] AVX512FP16,AVX512VL
|
||||
VGETMANTPH ymmreg|mask|z,ymmrm256|b16,imm8 [rmi:fv: evex.256.np.0f3a.w0 26 /r ib] AVX512FP16,AVX512VL
|
||||
VGETMANTPH zmmreg|mask|z,zmmrm512|b16|sae,imm8 [rmi:fv: evex.512.np.0f3a.w0 26 /r ib] AVX512FP16
|
||||
VGETMANTSH xmmreg|mask|z,xmmrm16|sae,imm8 [rmi:t1s: evex.128.np.0f3a.w0 27 /r ib] AVX512FP16
|
||||
VGETMAXPH xmmreg|mask|z,xmmrm128|b16 [rm:fv: evex.128.np.map5.w0 5f /r] AVX512FP16,AVX512VL
|
||||
VGETMAXPH ymmreg|mask|z,ymmrm256|b16 [rm:fv: evex.256.np.map5.w0 5f /r] AVX512FP16,AVX512VL
|
||||
@@ -5758,24 +5860,42 @@ VDPPHPS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.
|
||||
VMPSADBW xmmreg|mask|z,xmmreg,xmmrm128,imm8 [rvmi:fvm: evex.128.f3.0f3a.w0 42 /r ib] AVX10_2
|
||||
VMPSADBW ymmreg|mask|z,ymmreg,ymmrm256,imm8 [rvmi:fvm: evex.256.f3.0f3a.w0 42 /r ib] AVX10_2
|
||||
VMPSADBW zmmreg|mask|z,zmmreg,zmmrm512,imm8 [rvmi:fvm: evex.512.f3.0f3a.w0 42 /r ib] AVX10_2
|
||||
VPDPBSSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 50 /r ] AVX10_2
|
||||
VPDPBUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 51 /r ] AVX10_2
|
||||
VPDPBSSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f2.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 50 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPBUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 51 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWSUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.f3.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUSDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.66.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUD xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUD ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUD zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d2 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUDS xmmreg|mask|z,xmmreg,xmmrm128|b32 [rvm:fv: evex.128.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUDS ymmreg|mask|z,ymmreg,ymmrm256|b32 [rvm:fv: evex.256.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
VPDPWUUDS zmmreg|mask|z,zmmreg,zmmrm512|b32 [rvm:fv: evex.512.np.0f38.w0 d3 /r ] AVX10_2,AVX10_VNNIINT
|
||||
|
||||
;# AVX10.2 MINMAX instructions
|
||||
VMINMAXBF16 xmmreg|mask|z,xmmreg,xmmrm128|b16,imm8 [rvmi:fv: evex.128.f2.0f3a.w0 52 /r ib] AVX10_2
|
||||
|
||||
Reference in New Issue
Block a user