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travis: improve the RET instruction test

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Split the RET instruction test by mode for ease of disassembly, and
test more subcases.

Signed-off-by: H. Peter Anvin (Intel) <hpa@zytor.com>
This commit is contained in:
H. Peter Anvin (Intel)
2025-10-15 22:51:34 -07:00
parent e19c989bd5
commit 94923e1382
10 changed files with 111 additions and 56 deletions
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6
test/ret.asm
View File

@@ -36,6 +36,12 @@
retd
retnd
retfd
o16 ret
o16 retn
o16 retf
o32 ret
o32 retn
o32 retf
%ifdef ERROR
retq
retnq

1
travis/test/ret-16.bin.t Normal file
View File

@@ -0,0 +1 @@
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD>

12
travis/test/ret-16.stderr
View File

@@ -1,6 +1,6 @@
./travis/test/ret.asm:16: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:17: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:18: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:56: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:57: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:58: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:26: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:27: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:28: error: instruction not supported in 16-bit mode
./travis/test/ret.asm:29: error: invalid operands in 16-bit mode
./travis/test/ret.asm:30: error: invalid operands in 16-bit mode
./travis/test/ret.asm:31: error: invalid operands in 16-bit mode

1
travis/test/ret-32.bin.t Normal file
View File

@@ -0,0 +1 @@
<EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD>

10
travis/test/ret-32.stderr
View File

@@ -1,6 +1,6 @@
./travis/test/ret.asm:35: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:36: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:37: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:54: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:55: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:56: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:57: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:58: error: instruction not supported in 32-bit mode
./travis/test/ret.asm:57: error: invalid operands in 32-bit mode
./travis/test/ret.asm:58: error: invalid operands in 32-bit mode
./travis/test/ret.asm:59: error: invalid operands in 32-bit mode

1
travis/test/ret-64.bin.t Normal file
View File

@@ -0,0 +1 @@
<EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>H<EFBFBD><EFBFBD><EFBFBD>H<EFBFBD>

4
travis/test/ret-64.stderr
View File

@@ -1,2 +1,2 @@
./travis/test/ret.asm:51: error: instruction not supported in 64-bit mode
./travis/test/ret.asm:52: error: instruction not supported in 64-bit mode
./travis/test/ret.asm:76: error: instruction not supported in 64-bit mode
./travis/test/ret.asm:77: error: instruction not supported in 64-bit mode

41
travis/test/ret.asm
View File

@@ -1,6 +1,10 @@
;; All the flavors of RET
;; All the flavors of RET
%ifdef TEST_BITS_16
%ifndef TEST_BITS
%define TEST_BITS (16|32|64)
%endif
%if (TEST_BITS) & 16
bits 16
ret
@@ -12,14 +16,23 @@
retd
retnd
retfd
o16 ret
o16 retn
o16 retf
o32 ret
o32 retn
o32 retf
%ifdef ERROR
retq
retnq
retfq
o64 ret
o64 retn
o64 retf
%endif
%endif
%ifdef TEST_BITS_32
%if (TEST_BITS) & 32
bits 32
ret
@@ -31,14 +44,23 @@
retd
retnd
retfd
o16 ret
o16 retn
o16 retf
o32 ret
o32 retn
o32 retf
%ifdef ERROR
retq
retnq
retfq
o64 ret
o64 retn
o64 retf
%endif
%endif
%ifdef TEST_BITS_64
%if (TEST_BITS) & 64
bits 64
ret
@@ -47,12 +69,21 @@
retw
retnw
retfw
o16 ret
o16 retn
o16 retf
%ifdef ERROR
retd
retnd
%endif
o32 ret
o32 retn
%endif
retfd
o32 retf
retq
retnq
retfq
o64 ret
o64 retn
o64 retf
%endif

1
travis/test/ret.bin.t
View File

@@ -1 +0,0 @@
<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>f<EFBFBD>f<EFBFBD>f<EFBFBD><EFBFBD><EFBFBD><EFBFBD>H<EFBFBD>

90
travis/test/ret.json
View File

@@ -1,39 +1,55 @@
[
{
"description": "Test all the flavors of RET",
"id": "ret",
"format": "bin",
"source": "ret.asm",
"option": "-Ox -DTEST_BITS_16 -DTEST_BITS_32 -DTEST_BITS_64",
"target": [
{ "output": "ret.bin" }
]
},
{
"description": "Test all the flavors of RET (err 16 bit)",
"ref": "ret",
"option": "-DERROR -DTEST_BITS_16",
"target": [
{ "stderr": "ret-16.stderr" }
],
"error": "expected"
},
{
"description": "Test all the flavors of RET (err 32 bit)",
"ref": "ret",
"option": "-DERROR -DTEST_BITS_32",
"target": [
{ "stderr": "ret-32.stderr" }
],
"error": "expected"
},
{
"description": "Test all the flavors of RET (err 64 bit)",
"ref": "ret",
"option": "-DERROR -DTEST_BITS_64",
"target": [
{ "stderr": "ret-64.stderr" }
],
"error": "expected"
}
{
"description": "Test all the flavors of RET (16 bit)",
"id": "ret",
"format": "bin",
"source": "ret.asm",
"option": "-Ox -DTEST_BITS=16",
"target": [
{ "output": "ret-16.bin" }
]
},
{
"description": "Test all the flavors of RET (32 bit)",
"ref": "ret",
"option": "-Ox -DTEST_BITS=32",
"target": [
{ "output": "ret-32.bin" }
]
},
{
"description": "Test all the flavors of RET (64 bit)",
"ref": "ret",
"option": "-Ox -DTEST_BITS=64",
"target": [
{ "output": "ret-64.bin" }
]
},
{
"description": "Test all the flavors of RET (err 16 bit)",
"ref": "ret",
"option": "-Ox -DERROR -DTEST_BITS=16",
"target": [
{ "stderr": "ret-16.stderr" }
],
"error": "expected"
},
{
"description": "Test all the flavors of RET (err 32 bit)",
"ref": "ret",
"option": "-Ox -DERROR -DTEST_BITS=32",
"target": [
{ "stderr": "ret-32.stderr" }
],
"error": "expected"
},
{
"description": "Test all the flavors of RET (err 64 bit)",
"ref": "ret",
"option": "-Ox -DERROR -DTEST_BITS=64",
"target": [
{ "stderr": "ret-64.stderr" }
],
"error": "expected"
}
]