mirror of
https://github.com/netwide-assembler/nasm.git
synced 2025-09-22 10:43:39 -04:00
tune VADDPH instruction and its travis test
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@@ -42,3 +42,88 @@ testcase { 0x62, 0xb5, 0x7d, 0x08, 0x1d, 0x4c, 0xf0, 0x01
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testcase { 0x62, 0xf5, 0x7d, 0x48, 0x1d, 0xca }, { vcvtps2phx ymm1,zmm2 }
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testcase { 0x62, 0xb5, 0x7d, 0x48, 0x1d, 0x8c, 0xf0, 0x10, 0x00, 0x00, 0x00 }, { vcvtps2phx ymm1,[rax+r14*8+0x10] }
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testcase { 0x62, 0xb5, 0x7d, 0xc9, 0x1d, 0x8c, 0xf0, 0x10, 0x00, 0x00, 0x00 }, { vcvtps2phx ymm1{k1}{z},[rax+r14*8+0x10] }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0xc9 }, { {evex} VADDPH xmm1, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x0f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x1f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x1f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x0f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x0f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x1f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x1f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, oword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x8f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x9f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x9f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}{z}, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0xc9 }, { {evex} VADDPH xmm1{k7}{z}, xmm1 }
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testcase { 0x62, 0xf5, 0x74, 0x8f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, oword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x8f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1{k7}{z}, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x9f, 0x58, 0x08 }, { {evex} VADDPH xmm1{k7}{z}, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x9f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1{k7}{z}, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x08, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1, xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0xc9 }, { {evex} VADDPH ymm1, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x28, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x38, 0x58, 0x08 }, { {evex} VADDPH ymm1, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x38, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0xc9 }, { {evex} VADDPH ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x28, 0x58, 0x08 }, { {evex} VADDPH ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x28, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x38, 0x58, 0x08 }, { {evex} VADDPH ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x38, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x18, 0x58, 0x08 }, { {evex} VADDPH xmm1, xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x2f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x3f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x3f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0x2f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0x2f, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0x3f, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x3f, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0x18, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1, xmm1, word [rbp+r14*2+0x8]{1to8} }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0xaf, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0xbf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0xbf, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}{z}, ymm1, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0xc9 }, { {evex} VADDPH ymm1{k7}{z}, ymm1 }
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testcase { 0x62, 0xf5, 0x74, 0xaf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, yword [rax] }
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testcase { 0x62, 0xb5, 0x74, 0xaf, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH ymm1{k7}{z}, yword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x74, 0xbf, 0x58, 0x08 }, { {evex} VADDPH ymm1{k7}{z}, word [rax]{1to16} }
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testcase { 0x62, 0xb5, 0x74, 0xbf, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH ymm1{k7}{z}, word [rbp+r14*2+0x8]{1to16} }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0xc9 }, { {evex} VADDPH xmm1, xmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0x00 }, { {evex} VADDPH zmm0, zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x48, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x38, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x48, 0x58, 0x00 }, { {evex} VADDPH zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x48, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x38, 0x58, 0xc1 }, { {evex} VADDPH zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}, zmm0, zword [rax] }
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testcase { 0x62, 0xf5, 0x74, 0x08, 0x58, 0x08 }, { {evex} VADDPH xmm1, oword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x4f, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x3f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0x4f, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0x4f, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0x3f, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0xcf, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xbf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm0, zmm1,{rd-sae} }
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testcase { 0x62, 0xb5, 0x74, 0x08, 0x58, 0x8c, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH xmm1, oword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm1 }
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testcase { 0x62, 0xf5, 0x7c, 0xcf, 0x58, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zword [rax] }
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testcase { 0x62, 0xb5, 0x7c, 0xcf, 0x58, 0x84, 0x75, 0x08, 0x00, 0x00, 0x00 }, { {evex} VADDPH zmm0{k7}{z}, zword [rbp+r14*2+0x8] }
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testcase { 0x62, 0xf5, 0x7c, 0xbf, 0x58, 0xc1 }, { {evex} VADDPH zmm0{k7}{z}, zmm1,{rd-sae} }
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testcase { 0x62, 0xf5, 0x74, 0x18, 0x58, 0x08 }, { {evex} VADDPH xmm1, word [rax]{1to8} }
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testcase { 0x62, 0xb5, 0x74, 0x18, 0x58, 0x4c, 0x75, 0x02 }, { {evex} VADDPH xmm1, word [rbp+r14*2+0x8]{1to8} }
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@@ -5329,9 +5329,9 @@ TILESTORED mem,tmmreg [mr: vex.128.f3.0f38.w0 4b /r] AMXTILE,MIB,SIB,ANYSIZE,
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TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,LONG
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;# Intel AVX512-FP16 instructions
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VADDPH xmmreg|mask|z,xmmreg*,xmmrm16|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL
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VADDPH ymmreg|mask|z,ymmreg*,ymmrm16|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r] AVX512FP16,AVX512VL
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VADDPH zmmreg|mask|z,zmmreg*,zmmrm16|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r] AVX512FP16
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VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL,AVX10_1
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VADDPH ymmreg|mask|z,ymmreg*,ymmrm256|b16 [rvm:fv: evex.nds.256.np.map5.w0 58 /r] AVX512FP16,AVX512VL,AVX10_1
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VADDPH zmmreg|mask|z,zmmreg*,zmmrm512|b16|er [rvm:fv: evex.nds.512.np.map5.w0 58 /r] AVX512FP16,AVX10_1
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VADDSH xmmreg|mask|z,xmmreg*,xmmrm16|er [rvm:t1s: evex.nds.lig.f3.map5.w0 58 /r] AVX512FP16
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VCMPPH kreg|mask,xmmreg*,xmmrm16|b16,imm8 [rvmi:fv: evex.nds.128.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL
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VCMPPH kreg|mask,ymmreg*,ymmrm16|b16,imm8 [rvmi:fv: evex.nds.256.np.0f3a.w0 C2 /r ib] AVX512FP16,AVX512VL
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