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NASM 0.98.12

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This commit is contained in:
H. Peter Anvin
2002-04-30 21:02:01 +00:00
parent 4cf1748e68
commit 788e6c10e1
12 changed files with 1586 additions and 257 deletions
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13
assemble.c
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@@ -59,7 +59,8 @@
* as a literal byte in order to aid the disassembler. * as a literal byte in order to aid the disassembler.
* \340 - reserve <operand 0> bytes of uninitialised storage. * \340 - reserve <operand 0> bytes of uninitialised storage.
* Operand 0 had better be a segmentless constant. * Operand 0 had better be a segmentless constant.
* \370,\371,\372 - match only if operand 0, 1, 2 meets byte jump criteria. * \370,\371,\372 - match only if operand 0 meets byte jump criteria.
* 370 is used for Jcc, 371 is used for JMP.
* \373 - assemble 0x03 if bits==16, 0x05 if bits==32; * \373 - assemble 0x03 if bits==16, 0x05 if bits==32;
* used for conditional jump over longer jump * used for conditional jump over longer jump
*/ */
@@ -151,9 +152,11 @@ static int jmp_match (long segment, long offset, int bits,
unsigned char c = code[0]; unsigned char c = code[0];
if (c != 0370) return 0; if (c != 0370 && c != 0371) return 0;
if (ins->oprs[0].opflags & OPFLAG_FORWARD) return (!pass0); /* match a forward reference */ if (ins->oprs[0].opflags & OPFLAG_FORWARD) {
if (optimizing<0 && c==0370) return 1;
else return (pass0==0); /* match a forward reference */
}
isize = calcsize (segment, offset, bits, ins, code); isize = calcsize (segment, offset, bits, ins, code);
if (ins->oprs[0].segment != segment) return 0; if (ins->oprs[0].segment != segment) return 0;
isize = ins->oprs[0].offset - offset - isize; /* isize is now the delta */ isize = ins->oprs[0].offset - offset - isize; /* isize is now the delta */
@@ -546,7 +549,7 @@ static int is_sbyte (insn *ins, int op, int size)
int ret; int ret;
ret = !(ins->forw_ref && ins->oprs[op].opflags ) && /* dead in the water on forward reference or External */ ret = !(ins->forw_ref && ins->oprs[op].opflags ) && /* dead in the water on forward reference or External */
(optimizing || !(ins->oprs[op].type & (BITS16|BITS32))) && (optimizing>0 || !(ins->oprs[op].type & (BITS16|BITS32))) &&
ins->oprs[op].wrt==NO_SEG && ins->oprs[op].segment==NO_SEG; ins->oprs[op].wrt==NO_SEG && ins->oprs[op].segment==NO_SEG;
v = ins->oprs[op].offset; v = ins->oprs[op].offset;

140
insns.dat
View File

@@ -37,15 +37,15 @@ ADC rm16,imm8 \320\300\1\x83\202\15 8086
ADC rm32,imm8 \321\300\1\x83\202\15 386 ADC rm32,imm8 \321\300\1\x83\202\15 386
ADC reg_al,imm \1\x14\21 8086,SM ADC reg_al,imm \1\x14\21 8086,SM
ADC reg_ax,imm \320\1\x15\31 8086,SM ADC reg_ax,imm \320\1\x15\31 8086,SM
ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND ADC reg_eax,sbyte \321\1\x83\202\15 386,SM,ND
ADC reg_eax,sbig \321\1\x15\41 386,SM,ND ADC reg_eax,sbig \321\1\x15\41 386,SM,ND
ADC reg_eax,imm32 \321\1\x15\41 386 ADC reg_eax,imm32 \321\1\x15\41 386
ADC rm8,imm \300\1\x80\202\21 8086,SM ADC rm8,imm \300\1\x80\202\21 8086,SM
ADC rm16,imm \320\300\134\1\x81\202\131 8086,SM ADC rm16,imm \320\300\134\1\x81\202\131 8086,SM
ADC rm32,imm \321\300\144\1\x81\202\141 386,SM ADC rm32,imm \321\300\144\1\x81\202\141 386,SM
ADC mem,imm8 \300\1\x80\202\21 8086,SM ADC mem,imm8 \300\1\x80\202\21 8086,SM
ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM ADC mem,imm16 \320\300\134\1\x81\202\131 8086,SM
ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM ADC mem,imm32 \321\300\144\1\x81\202\141 386,SM
ADD mem,reg8 \300\17\101 8086,SM ADD mem,reg8 \300\17\101 8086,SM
ADD reg8,reg8 \300\17\101 8086 ADD reg8,reg8 \300\17\101 8086
ADD mem,reg16 \320\300\1\x01\101 8086,SM ADD mem,reg16 \320\300\1\x01\101 8086,SM
@@ -62,15 +62,15 @@ ADD rm16,imm8 \320\300\1\x83\200\15 8086
ADD rm32,imm8 \321\300\1\x83\200\15 386 ADD rm32,imm8 \321\300\1\x83\200\15 386
ADD reg_al,imm \1\x04\21 8086,SM ADD reg_al,imm \1\x04\21 8086,SM
ADD reg_ax,imm \320\1\x05\31 8086,SM ADD reg_ax,imm \320\1\x05\31 8086,SM
ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND ADD reg_eax,sbyte \321\1\x83\200\15 386,SM,ND
ADD reg_eax,sbig \321\1\x05\41 386,SM,ND ADD reg_eax,sbig \321\1\x05\41 386,SM,ND
ADD reg_eax,imm32 \321\1\x05\41 386 ADD reg_eax,imm32 \321\1\x05\41 386
ADD rm8,imm \300\1\x80\200\21 8086,SM ADD rm8,imm \300\1\x80\200\21 8086,SM
ADD rm16,imm \320\300\134\1\x81\200\131 8086,SM ADD rm16,imm \320\300\134\1\x81\200\131 8086,SM
ADD rm32,imm \321\300\144\1\x81\200\141 386,SM ADD rm32,imm \321\300\144\1\x81\200\141 386,SM
ADD mem,imm8 \300\1\x80\200\21 8086,SM ADD mem,imm8 \300\1\x80\200\21 8086,SM
ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM ADD mem,imm16 \320\300\134\1\x81\200\131 8086,SM
ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM ADD mem,imm32 \321\300\144\1\x81\200\141 386,SM
AND mem,reg8 \300\1\x20\101 8086,SM AND mem,reg8 \300\1\x20\101 8086,SM
AND reg8,reg8 \300\1\x20\101 8086 AND reg8,reg8 \300\1\x20\101 8086
AND mem,reg16 \320\300\1\x21\101 8086,SM AND mem,reg16 \320\300\1\x21\101 8086,SM
@@ -87,15 +87,15 @@ AND rm16,imm8 \320\300\1\x83\204\15 8086
AND rm32,imm8 \321\300\1\x83\204\15 386 AND rm32,imm8 \321\300\1\x83\204\15 386
AND reg_al,imm \1\x24\21 8086,SM AND reg_al,imm \1\x24\21 8086,SM
AND reg_ax,imm \320\1\x25\31 8086,SM AND reg_ax,imm \320\1\x25\31 8086,SM
AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND AND reg_eax,sbyte \321\1\x83\204\15 386,SM,ND
AND reg_eax,sbig \321\1\x25\41 386,SM,ND AND reg_eax,sbig \321\1\x25\41 386,SM,ND
AND reg_eax,imm32 \321\1\x25\41 386 AND reg_eax,imm32 \321\1\x25\41 386
AND rm8,imm \300\1\x80\204\21 8086,SM AND rm8,imm \300\1\x80\204\21 8086,SM
AND rm16,imm \320\300\134\1\x81\204\131 8086,SM AND rm16,imm \320\300\134\1\x81\204\131 8086,SM
AND rm32,imm \321\300\144\1\x81\204\141 386,SM AND rm32,imm \321\300\144\1\x81\204\141 386,SM
AND mem,imm8 \300\1\x80\204\21 8086,SM AND mem,imm8 \300\1\x80\204\21 8086,SM
AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM AND mem,imm16 \320\300\134\1\x81\204\131 8086,SM
AND mem,imm32 \321\300\144\1\x81\204\141 386,SM AND mem,imm32 \321\300\144\1\x81\204\141 386,SM
ARPL mem,reg16 \300\1\x63\101 286,PROT,SM ARPL mem,reg16 \300\1\x63\101 286,PROT,SM
ARPL reg16,reg16 \300\1\x63\101 286,PROT ARPL reg16,reg16 \300\1\x63\101 286,PROT
BOUND reg16,mem \320\301\1\x62\110 186 BOUND reg16,mem \320\301\1\x62\110 186
@@ -181,15 +181,15 @@ CMP rm16,imm8 \320\300\1\x83\207\15 8086
CMP rm32,imm8 \321\300\1\x83\207\15 386 CMP rm32,imm8 \321\300\1\x83\207\15 386
CMP reg_al,imm \1\x3C\21 8086,SM CMP reg_al,imm \1\x3C\21 8086,SM
CMP reg_ax,imm \320\1\x3D\31 8086,SM CMP reg_ax,imm \320\1\x3D\31 8086,SM
CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND CMP reg_eax,sbyte \321\1\x83\207\15 386,SM,ND
CMP reg_eax,sbig \321\1\x3D\41 386,SM,ND CMP reg_eax,sbig \321\1\x3D\41 386,SM,ND
CMP reg_eax,imm32 \321\1\x3D\41 386 CMP reg_eax,imm32 \321\1\x3D\41 386
CMP rm8,imm \300\1\x80\207\21 8086,SM CMP rm8,imm \300\1\x80\207\21 8086,SM
CMP rm16,imm \320\300\134\1\x81\207\131 8086,SM CMP rm16,imm \320\300\134\1\x81\207\131 8086,SM
CMP rm32,imm \321\300\144\1\x81\207\141 386,SM CMP rm32,imm \321\300\144\1\x81\207\141 386,SM
CMP mem,imm8 \300\1\x80\207\21 8086,SM CMP mem,imm8 \300\1\x80\207\21 8086,SM
CMP mem,imm16 \320\300\134\1\x81\207\131 8086,SM CMP mem,imm16 \320\300\134\1\x81\207\131 8086,SM
CMP mem,imm32 \321\300\144\1\x81\207\141 386,SM CMP mem,imm32 \321\300\144\1\x81\207\141 386,SM
CMPSB void \332\1\xA6 8086 CMPSB void \332\1\xA6 8086
CMPSD void \332\321\1\xA7 386 CMPSD void \332\321\1\xA7 386
CMPSW void \332\320\1\xA7 8086 CMPSW void \332\320\1\xA7 8086
@@ -427,29 +427,29 @@ IMUL reg16,reg16 \320\2\x0F\xAF\110 386
IMUL reg32,mem \321\301\2\x0F\xAF\110 386,SM IMUL reg32,mem \321\301\2\x0F\xAF\110 386,SM
IMUL reg32,reg32 \321\2\x0F\xAF\110 386 IMUL reg32,reg32 \321\2\x0F\xAF\110 386
IMUL reg16,mem,imm8 \320\301\1\x6B\110\16 186,SM IMUL reg16,mem,imm8 \320\301\1\x6B\110\16 186,SM
IMUL reg16,mem,sbyte \320\301\1\x6B\110\16 186,SM,ND IMUL reg16,mem,sbyte \320\301\1\x6B\110\16 186,SM,ND
IMUL reg16,mem,imm16 \320\301\1\x69\110\32 186,SM IMUL reg16,mem,imm16 \320\301\1\x69\110\32 186,SM
IMUL reg16,mem,imm \320\301\135\1\x69\110\132 186,SM,ND IMUL reg16,mem,imm \320\301\135\1\x69\110\132 186,SM,ND
IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186 IMUL reg16,reg16,imm8 \320\1\x6B\110\16 186
IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND IMUL reg16,reg16,sbyte \320\1\x6B\110\16 186,SM,ND
IMUL reg16,reg16,imm16 \320\1\x69\110\32 186 IMUL reg16,reg16,imm16 \320\1\x69\110\32 186
IMUL reg16,reg16,imm \320\135\1\x69\110\132 186,SM,ND IMUL reg16,reg16,imm \320\135\1\x69\110\132 186,SM,ND
IMUL reg32,mem,imm8 \321\301\1\x6B\110\16 386,SM IMUL reg32,mem,imm8 \321\301\1\x6B\110\16 386,SM
IMUL reg32,mem,sbyte \321\301\1\x6B\110\16 386,SM,ND IMUL reg32,mem,sbyte \321\301\1\x6B\110\16 386,SM,ND
IMUL reg32,mem,imm32 \321\301\1\x69\110\42 386,SM IMUL reg32,mem,imm32 \321\301\1\x69\110\42 386,SM
IMUL reg32,mem,imm \321\301\145\1\x69\110\142 386,SM,ND IMUL reg32,mem,imm \321\301\145\1\x69\110\142 386,SM,ND
IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386 IMUL reg32,reg32,imm8 \321\1\x6B\110\16 386
IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND IMUL reg32,reg32,sbyte \321\1\x6B\110\16 386,SM,ND
IMUL reg32,reg32,imm32 \321\1\x69\110\42 386 IMUL reg32,reg32,imm32 \321\1\x69\110\42 386
IMUL reg32,reg32,imm \321\145\1\x69\110\142 386,SM,ND IMUL reg32,reg32,imm \321\145\1\x69\110\142 386,SM,ND
IMUL reg16,imm8 \320\1\x6B\100\15 186 IMUL reg16,imm8 \320\1\x6B\100\15 186
IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND IMUL reg16,sbyte \320\1\x6B\100\15 186,SM,ND
IMUL reg16,imm16 \320\1\x69\100\31 186 IMUL reg16,imm16 \320\1\x69\100\31 186
IMUL reg16,imm \320\134\1\x69\100\131 186,SM,ND IMUL reg16,imm \320\134\1\x69\100\131 186,SM,ND
IMUL reg32,imm8 \321\1\x6B\100\15 386 IMUL reg32,imm8 \321\1\x6B\100\15 386
IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND IMUL reg32,sbyte \321\1\x6B\100\15 386,SM,ND
IMUL reg32,imm32 \321\1\x69\100\41 386 IMUL reg32,imm32 \321\1\x69\100\41 386
IMUL reg32,imm \321\144\1\x69\100\141 386,SM,ND IMUL reg32,imm \321\144\1\x69\100\141 386,SM,ND
IN reg_al,imm \1\xE4\25 8086,SB IN reg_al,imm \1\xE4\25 8086,SB
IN reg_ax,imm \320\1\xE5\25 8086,SB IN reg_ax,imm \320\1\xE5\25 8086,SB
IN reg_eax,imm \321\1\xE5\25 386,SB IN reg_eax,imm \321\1\xE5\25 386,SB
@@ -479,7 +479,7 @@ IRETW void \320\1\xCF 8086
JCXZ imm \310\1\xE3\50 8086 JCXZ imm \310\1\xE3\50 8086
JECXZ imm \311\1\xE3\50 386 JECXZ imm \311\1\xE3\50 386
JMP imm|short \1\xEB\50 8086 JMP imm|short \1\xEB\50 8086
JMP imm \370\1\xEB\50 8086,ND JMP imm \371\1\xEB\50 8086,ND
JMP imm \322\1\xE9\64 8086 JMP imm \322\1\xE9\64 8086
JMP imm|near \322\1\xE9\64 8086,ND JMP imm|near \322\1\xE9\64 8086,ND
JMP imm|far \322\1\xEA\34\37 8086,ND JMP imm|far \322\1\xEA\34\37 8086,ND
@@ -558,9 +558,9 @@ LSS reg32,mem \321\301\2\x0F\xB2\110 386
LTR mem \300\1\x0F\17\203 286,PROT,PRIV LTR mem \300\1\x0F\17\203 286,PROT,PRIV
LTR mem16 \300\1\x0F\17\203 286,PROT,PRIV LTR mem16 \300\1\x0F\17\203 286,PROT,PRIV
LTR reg16 \300\1\x0F\17\203 286,PROT,PRIV LTR reg16 \300\1\x0F\17\203 286,PROT,PRIV
MOV mem,reg_cs \300\1\x8C\201 8086,SM MOV mem,reg_cs \300\1\x8C\201 8086,SM
MOV mem,reg_dess \300\1\x8C\101 8086,SM MOV mem,reg_dess \300\1\x8C\101 8086,SM
MOV mem,reg_fsgs \300\1\x8C\101 386,SM MOV mem,reg_fsgs \300\1\x8C\101 386,SM
MOV reg16,reg_cs \320\300\1\x8C\201 8086 MOV reg16,reg_cs \320\300\1\x8C\201 8086
MOV reg16,reg_dess \320\300\1\x8C\101 8086 MOV reg16,reg_dess \320\300\1\x8C\101 8086
MOV reg16,reg_fsgs \320\300\1\x8C\101 386 MOV reg16,reg_fsgs \320\300\1\x8C\101 386
@@ -653,15 +653,15 @@ OR rm16,imm8 \320\300\1\x83\201\15 8086
OR rm32,imm8 \321\300\1\x83\201\15 386 OR rm32,imm8 \321\300\1\x83\201\15 386
OR reg_al,imm \1\x0C\21 8086,SM OR reg_al,imm \1\x0C\21 8086,SM
OR reg_ax,imm \320\1\x0D\31 8086,SM OR reg_ax,imm \320\1\x0D\31 8086,SM
OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND OR reg_eax,sbyte \321\1\x83\201\15 386,SM,ND
OR reg_eax,sbig \321\1\x0D\41 386,SM,ND OR reg_eax,sbig \321\1\x0D\41 386,SM,ND
OR reg_eax,imm32 \321\1\x0D\41 386 OR reg_eax,imm32 \321\1\x0D\41 386
OR rm8,imm \300\1\x80\201\21 8086,SM OR rm8,imm \300\1\x80\201\21 8086,SM
OR rm16,imm \320\300\134\1\x81\201\131 8086,SM OR rm16,imm \320\300\134\1\x81\201\131 8086,SM
OR rm32,imm \321\300\144\1\x81\201\141 386,SM OR rm32,imm \321\300\144\1\x81\201\141 386,SM
OR mem,imm8 \300\1\x80\201\21 8086,SM OR mem,imm8 \300\1\x80\201\21 8086,SM
OR mem,imm16 \320\300\134\1\x81\201\131 8086,SM OR mem,imm16 \320\300\134\1\x81\201\131 8086,SM
OR mem,imm32 \321\300\144\1\x81\201\141 386,SM OR mem,imm32 \321\300\144\1\x81\201\141 386,SM
OUT imm,reg_al \1\xE6\24 8086,SB OUT imm,reg_al \1\xE6\24 8086,SB
OUT imm,reg_ax \320\1\xE7\24 8086,SB OUT imm,reg_ax \320\1\xE7\24 8086,SB
OUT imm,reg_eax \321\1\xE7\24 386,SB OUT imm,reg_eax \321\1\xE7\24 386,SB
@@ -946,15 +946,15 @@ SBB rm16,imm8 \320\300\1\x83\203\15 8086
SBB rm32,imm8 \321\300\1\x83\203\15 8086 SBB rm32,imm8 \321\300\1\x83\203\15 8086
SBB reg_al,imm \1\x1C\21 8086,SM SBB reg_al,imm \1\x1C\21 8086,SM
SBB reg_ax,imm \320\1\x1D\31 8086,SM SBB reg_ax,imm \320\1\x1D\31 8086,SM
SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND SBB reg_eax,sbyte \321\1\x83\203\15 386,SM,ND
SBB reg_eax,sbig \321\1\x1D\41 386,SM,ND SBB reg_eax,sbig \321\1\x1D\41 386,SM,ND
SBB reg_eax,imm32 \321\1\x1D\41 386 SBB reg_eax,imm32 \321\1\x1D\41 386
SBB rm8,imm \300\1\x80\203\21 8086,SM SBB rm8,imm \300\1\x80\203\21 8086,SM
SBB rm16,imm \320\300\134\1\x81\203\131 8086,SM SBB rm16,imm \320\300\134\1\x81\203\131 8086,SM
SBB rm32,imm \321\300\144\1\x81\203\141 386,SM SBB rm32,imm \321\300\144\1\x81\203\141 386,SM
SBB mem,imm8 \300\1\x80\203\21 8086,SM SBB mem,imm8 \300\1\x80\203\21 8086,SM
SBB mem,imm16 \320\300\134\1\x81\203\131 8086,SM SBB mem,imm16 \320\300\134\1\x81\203\131 8086,SM
SBB mem,imm32 \321\300\144\1\x81\203\141 386,SM SBB mem,imm32 \321\300\144\1\x81\203\141 386,SM
SCASB void \332\1\xAE 8086 SCASB void \332\1\xAE 8086
SCASD void \332\321\1\xAF 386 SCASD void \332\321\1\xAF 386
SCASW void \332\320\1\xAF 8086 SCASW void \332\320\1\xAF 8086
@@ -1029,15 +1029,15 @@ SUB rm16,imm8 \320\300\1\x83\205\15 8086
SUB rm32,imm8 \321\300\1\x83\205\15 386 SUB rm32,imm8 \321\300\1\x83\205\15 386
SUB reg_al,imm \1\x2C\21 8086,SM SUB reg_al,imm \1\x2C\21 8086,SM
SUB reg_ax,imm \320\1\x2D\31 8086,SM SUB reg_ax,imm \320\1\x2D\31 8086,SM
SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND SUB reg_eax,sbyte \321\1\x83\205\15 386,SM,ND
SUB reg_eax,sbig \321\1\x2D\41 386,SM,ND SUB reg_eax,sbig \321\1\x2D\41 386,SM,ND
SUB reg_eax,imm32 \321\1\x2D\41 386 SUB reg_eax,imm32 \321\1\x2D\41 386
SUB rm8,imm \300\1\x80\205\21 8086,SM SUB rm8,imm \300\1\x80\205\21 8086,SM
SUB rm16,imm \320\300\134\1\x81\205\131 8086,SM SUB rm16,imm \320\300\134\1\x81\205\131 8086,SM
SUB rm32,imm \321\300\144\1\x81\205\141 386,SM SUB rm32,imm \321\300\144\1\x81\205\141 386,SM
SUB mem,imm8 \300\1\x80\205\21 8086,SM SUB mem,imm8 \300\1\x80\205\21 8086,SM
SUB mem,imm16 \320\300\134\1\x81\205\131 8086,SM SUB mem,imm16 \320\300\134\1\x81\205\131 8086,SM
SUB mem,imm32 \321\300\144\1\x81\205\141 386,SM SUB mem,imm32 \321\300\144\1\x81\205\141 386,SM
SVDC mem80,reg_sreg \300\2\x0F\x78\101 486,CYRIX,SMM SVDC mem80,reg_sreg \300\2\x0F\x78\101 486,CYRIX,SMM
SVLDT mem80 \300\2\x0F\x7A\200 486,CYRIX,SMM SVLDT mem80 \300\2\x0F\x7A\200 486,CYRIX,SMM
SVTS mem80 \300\2\x0F\x7C\200 486,CYRIX,SMM SVTS mem80 \300\2\x0F\x7C\200 486,CYRIX,SMM
@@ -1132,15 +1132,15 @@ XOR rm16,imm8 \320\300\1\x83\206\15 8086
XOR rm32,imm8 \321\300\1\x83\206\15 386 XOR rm32,imm8 \321\300\1\x83\206\15 386
XOR reg_al,imm \1\x34\21 8086,SM XOR reg_al,imm \1\x34\21 8086,SM
XOR reg_ax,imm \320\1\x35\31 8086,SM XOR reg_ax,imm \320\1\x35\31 8086,SM
XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND XOR reg_eax,sbyte \321\1\x83\206\15 386,SM,ND
XOR reg_eax,sbig \321\1\x35\41 386,SM,ND XOR reg_eax,sbig \321\1\x35\41 386,SM,ND
XOR reg_eax,imm32 \321\1\x35\41 386 XOR reg_eax,imm32 \321\1\x35\41 386
XOR rm8,imm \300\1\x80\206\21 8086,SM XOR rm8,imm \300\1\x80\206\21 8086,SM
XOR rm16,imm \320\300\134\1\x81\206\131 8086,SM XOR rm16,imm \320\300\134\1\x81\206\131 8086,SM
XOR rm32,imm \321\300\144\1\x81\206\141 386,SM XOR rm32,imm \321\300\144\1\x81\206\141 386,SM
XOR mem,imm8 \300\1\x80\206\21 8086,SM XOR mem,imm8 \300\1\x80\206\21 8086,SM
XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM XOR mem,imm16 \320\300\134\1\x81\206\131 8086,SM
XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM XOR mem,imm32 \321\300\144\1\x81\206\141 386,SM
CMOVcc reg16,mem \320\301\1\x0F\330\x40\110 P6,SM CMOVcc reg16,mem \320\301\1\x0F\330\x40\110 P6,SM
CMOVcc reg16,reg16 \320\301\1\x0F\330\x40\110 P6 CMOVcc reg16,reg16 \320\301\1\x0F\330\x40\110 P6
CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM CMOVcc reg32,mem \321\301\1\x0F\330\x40\110 P6,SM

16
macros.c
View File

@@ -1,12 +1,6 @@
/* This file auto-generated from standard.mac by macros.pl - don't edit it */ /* This file auto-generated from standard.mac by macros.pl - don't edit it */
static char *stdmac[] = { static char *stdmac[] = {
"%idefine IDEAL",
"%idefine JUMPS",
"%idefine P386",
"%idefine P486",
"%idefine P586",
"%idefine END",
"%define __NASM_MAJOR__ 0", "%define __NASM_MAJOR__ 0",
"%define __NASM_MINOR__ 98", "%define __NASM_MINOR__ 98",
"%define __FILE__", "%define __FILE__",
@@ -63,12 +57,6 @@ static char *stdmac[] = {
"%imacro bits 1+.nolist", "%imacro bits 1+.nolist",
"[bits %1]", "[bits %1]",
"%endmacro", "%endmacro",
"%imacro use16 0.nolist",
"[bits 16]",
"%endmacro",
"%imacro use32 0.nolist",
"[bits 32]",
"%endmacro",
"%imacro global 1-*.nolist", "%imacro global 1-*.nolist",
"%rep %0", "%rep %0",
"[global %1]", "[global %1]",
@@ -81,9 +69,5 @@ static char *stdmac[] = {
"%rotate 1", "%rotate 1",
"%endrep", "%endrep",
"%endmacro", "%endmacro",
"%imacro cpu 1+.nolist",
"[cpu %1]",
"%endmacro",
NULL NULL
}; };
#define TASM_MACRO_COUNT 6

2
macros.pl
View File

@@ -7,7 +7,7 @@
# redistributable under the licence given in the file "Licence" # redistributable under the licence given in the file "Licence"
# distributed in the NASM archive. # distributed in the NASM archive.
# use strict; # if your PERL's got it # use strict;
my $fname; my $fname;
my $line = 0; my $line = 0;

BIN
misc/exasm.zip
View File

Binary file not shown.

27
nasm.c
View File

@@ -51,7 +51,7 @@ static struct ofmt *ofmt = NULL;
static FILE *error_file; /* Where to write error messages */ static FILE *error_file; /* Where to write error messages */
static FILE *ofile = NULL; static FILE *ofile = NULL;
int optimizing = 0; /* number of optimization passes to take */ int optimizing = -1; /* number of optimization passes to take */
static int sb, cmd_sb = 16; /* by default */ static int sb, cmd_sb = 16; /* by default */
static unsigned long cmd_cpu = IF_PLEVEL; /* highest level by default */ static unsigned long cmd_cpu = IF_PLEVEL; /* highest level by default */
static unsigned long cpu = IF_PLEVEL; /* passed to insn_size & assemble.c */ static unsigned long cpu = IF_PLEVEL; /* passed to insn_size & assemble.c */
@@ -386,11 +386,14 @@ static int process_arg (char *p, char *q)
else else
ofmt->current_dfmt = ofmt->debug_formats[0]; ofmt->current_dfmt = ofmt->debug_formats[0];
} else if (p[1]=='O') { /* Optimization level */ } else if (p[1]=='O') { /* Optimization level */
int opt;
if (!isdigit(*param)) report_error(ERR_FATAL, if (!isdigit(*param)) report_error(ERR_FATAL,
"command line optimization level must be 0..3 or <nn>"); "command line optimization level must be 0..3 or <nn>");
optimizing = atoi(param); opt = atoi(param);
if (optimizing <= 0) optimizing = 0; if (opt<=0) optimizing = -1; /* 0.98 behaviour */
else if (optimizing <= 3) optimizing *= 5; /* 5 passes for each level */ else if (opt==1) optimizing = 0; /* Two passes, 0.98.09 behavior */
else if (opt<=3) optimizing = opt*5; /* Multiple passes */
else optimizing = opt; /* Multiple passes */
} else if (p[1]=='P' || p[1]=='p') { /* pre-include */ } else if (p[1]=='P' || p[1]=='p') { /* pre-include */
pp_pre_include (param); pp_pre_include (param);
} else if (p[1]=='D' || p[1]=='d') { /* pre-define */ } else if (p[1]=='D' || p[1]=='d') { /* pre-define */
@@ -754,8 +757,8 @@ static void assemble_file (char *fname)
report_error(ERR_FATAL, "command line: " report_error(ERR_FATAL, "command line: "
"32-bit segment size requires a higher cpu"); "32-bit segment size requires a higher cpu");
pass_max = optimizing + 2; /* passes 1, optimizing, then 2 */ pass_max = (optimizing>0 ? optimizing : 0) + 2; /* passes 1, optimizing, then 2 */
pass0 = !optimizing; /* start at 1 if not optimizing */ pass0 = !(optimizing>0); /* start at 1 if not optimizing */
for (pass = 1; pass <= pass_max && pass0 <= 2; pass++) { for (pass = 1; pass <= pass_max && pass0 <= 2; pass++) {
int pass1, pass2; int pass1, pass2;
ldfunc def_label; ldfunc def_label;
@@ -1027,11 +1030,11 @@ static void assemble_file (char *fname)
report_error, evaluate, report_error, evaluate,
def_label); def_label);
if (!optimizing && pass == 2) { if (!(optimizing>0) && pass == 2) {
if (forwref != NULL && globallineno == forwref->lineno) { if (forwref != NULL && globallineno == forwref->lineno) {
output_ins.forw_ref = TRUE; output_ins.forw_ref = TRUE;
do { do {
output_ins.oprs[forwref->operand].opflags|= OPFLAG_FORWARD; output_ins.oprs[forwref->operand].opflags |= OPFLAG_FORWARD;
forwref = saa_rstruct (forwrefs); forwref = saa_rstruct (forwrefs);
} while (forwref != NULL && forwref->lineno == globallineno); } while (forwref != NULL && forwref->lineno == globallineno);
} else } else
@@ -1039,7 +1042,7 @@ static void assemble_file (char *fname)
} }
if (!optimizing && output_ins.forw_ref) if (!(optimizing>0) && output_ins.forw_ref)
{ {
if (pass == 1) { if (pass == 1) {
for(i = 0; i < output_ins.operands; i++) for(i = 0; i < output_ins.operands; i++)
@@ -1251,13 +1254,13 @@ static void assemble_file (char *fname)
if (pass>1 && !global_offset_changed) { if (pass>1 && !global_offset_changed) {
pass0++; pass0++;
if (pass0==2) pass = pass_max - 1; if (pass0==2) pass = pass_max - 1;
} else if (!optimizing) pass0++; } else if (!(optimizing>0)) pass0++;
} /* for (pass=1; pass<=2; pass++) */ } /* for (pass=1; pass<=2; pass++) */
nasmlist.cleanup(); nasmlist.cleanup();
#if 1 #if 1
if (optimizing && using_debug_info) /* -On and -g switches */ if (optimizing>0 && using_debug_info) /* -On and -g switches */
fprintf(error_file, fprintf(error_file,
"info:: assembly required 1+%d+1 passes\n", pass_cnt-2); "info:: assembly required 1+%d+1 passes\n", pass_cnt-2);
#endif #endif
@@ -1511,6 +1514,8 @@ static unsigned long get_cpu (char *value)
!nasm_stricmp(value, "p2") ) return IF_P6; !nasm_stricmp(value, "p2") ) return IF_P6;
if (!nasm_stricmp(value, "p3") || if (!nasm_stricmp(value, "p3") ||
!nasm_stricmp(value, "katmai") ) return IF_KATMAI; !nasm_stricmp(value, "katmai") ) return IF_KATMAI;
if (!nasm_stricmp(value, "p4") || /* is this right? -- jrc */
!nasm_stricmp(value, "willamette") ) return IF_WILLAMETTE;
report_error (pass0<2 ? ERR_NONFATAL : ERR_FATAL, "unknown 'cpu' type"); report_error (pass0<2 ? ERR_NONFATAL : ERR_FATAL, "unknown 'cpu' type");

2
nasm.h
View File

@@ -13,7 +13,7 @@
#define NASM_MAJOR_VER 0 #define NASM_MAJOR_VER 0
#define NASM_MINOR_VER 98 #define NASM_MINOR_VER 98
#define NASM_VER "0.98.11" #define NASM_VER "0.98.12"
#ifndef NULL #ifndef NULL
#define NULL 0 #define NULL 0

2
parser.c
View File

@@ -686,7 +686,7 @@ insn *parse_line (int pass, char *buffer, insn *result,
if (is_simple(value)) { if (is_simple(value)) {
if (reloc_value(value)==1) if (reloc_value(value)==1)
result->oprs[operand].type |= UNITY; result->oprs[operand].type |= UNITY;
if (optimizing) { if (optimizing>0) {
if (reloc_value(value) >= -128 && if (reloc_value(value) >= -128 &&
reloc_value(value) <= 127) reloc_value(value) <= 127)
result->oprs[operand].type |= SBYTE; result->oprs[operand].type |= SBYTE;

3
preproc.c
View File

@@ -917,7 +917,8 @@ delete_Token(Token * t)
{ {
Token *next = t->next; Token *next = t->next;
nasm_free(t->text); nasm_free(t->text);
t->next = freeTokens ? freeTokens->next : NULL; /* t->next = freeTokens ? freeTokens->next : NULL; */
t->next = freeTokens;
freeTokens = t; freeTokens = t;
return next; return next;
} }

170
rdoff/Makefile.in
View File

@@ -1,86 +1,84 @@
*************** # $Id$
*** 1,4 **** #
- # $Id$ # Auto-configuring Makefile for RDOFF object file utils; part of the
# # Netwide Assembler
# Auto-configuring Makefile for RDOFF object file utils; part of the #
# Netwide Assembler # The Netwide Assembler is copyright (C) 1996 Simon Tatham and
--- 1,4 ---- # Julian Hall. All rights reserved. The software is
+ # $Id$ # redistributable under the licence given in the file "Licence"
# # distributed in the NASM archive.
# Auto-configuring Makefile for RDOFF object file utils; part of the
# Netwide Assembler top_srcdir = @top_srcdir@
*************** srcdir = @srcdir@
*** 31,37 **** VPATH = @srcdir@
.c.o: prefix = @prefix@
$(CC) -c $(CFLAGS) $< exec_prefix = @exec_prefix@
bindir = @bindir@
- all: rdfdump ldrdf rdx rdflib rdf2bin rdf2com mandir = @mandir@
rdfdump: rdfdump.o CC = @CC@
$(CC) $(LDFLAGS) -o rdfdump rdfdump.o CFLAGS = @CFLAGS@ @GCCFLAGS@ -I$(srcdir) -I$(top_srcdir)
--- 31,37 ---- LDFLAGS = @LDFLAGS@
.c.o:
$(CC) -c $(CFLAGS) $< INSTALL = @INSTALL@
INSTALL_PROGRAM = @INSTALL_PROGRAM@
+ all: rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx INSTALL_DATA = @INSTALL_DATA@
LN_S = @LN_S@
rdfdump: rdfdump.o
$(CC) $(LDFLAGS) -o rdfdump rdfdump.o LDRDFLIBS = rdoff.o nasmlib.o symtab.o collectn.o rdlib.o segtab.o hash.o
*************** RDXLIBS = rdoff.o rdfload.o symtab.o collectn.o hash.o
*** 45,51 ****
$(CC) $(LDFLAGS) -o rdf2bin rdf2bin.o $(RDXLIBS) nasmlib.o .c.o:
rdf2com: $(CC) -c $(CFLAGS) $<
rm -f rdf2com && $(LN_S) rdf2bin rdf2com
all: rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx
rdf2bin.o: rdf2bin.c
rdfdump.o: rdfdump.c rdfdump: rdfdump.o
rdoff.o: rdoff.c rdoff.h $(CC) $(LDFLAGS) -o rdfdump rdfdump.o
--- 45,54 ---- ldrdf: ldrdf.o $(LDRDFLIBS)
$(CC) $(LDFLAGS) -o rdf2bin rdf2bin.o $(RDXLIBS) nasmlib.o $(CC) $(LDFLAGS) -o ldrdf ldrdf.o $(LDRDFLIBS)
rdf2com: rdx: rdx.o $(RDXLIBS)
rm -f rdf2com && $(LN_S) rdf2bin rdf2com $(CC) $(LDFLAGS) -o rdx rdx.o $(RDXLIBS)
+ rdf2ihx: rdf2ihx.o $(RDXLIBS) nasmlib.o rdflib: rdflib.o
+ $(CC) $(LDFLAGS) -o rdf2ihx rdf2ihx.o $(RDXLIBS) nasmlib.o $(CC) $(LDFLAGS) -o rdflib rdflib.o
rdf2bin: rdf2bin.o $(RDXLIBS) nasmlib.o
+ rdf2ihx.o: rdf2ihx.c $(CC) $(LDFLAGS) -o rdf2bin rdf2bin.o $(RDXLIBS) nasmlib.o
rdf2bin.o: rdf2bin.c rdf2com:
rdfdump.o: rdfdump.c rm -f rdf2com && $(LN_S) rdf2bin rdf2com
rdoff.o: rdoff.c rdoff.h rdf2ihx: rdf2ihx.o $(RDXLIBS) nasmlib.o
*************** $(CC) $(LDFLAGS) -o rdf2ihx rdf2ihx.o $(RDXLIBS) nasmlib.o
*** 62,78 ****
$(CC) -c $(CFLAGS) $(top_srcdir)/nasmlib.c rdf2ihx.o: rdf2ihx.c
rdf2bin.o: rdf2bin.c
clean: rdfdump.o: rdfdump.c
- rm -f *.o rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdoff.o: rdoff.c rdoff.h
ldrdf.o: ldrdf.c rdoff.h $(top_srcdir)/nasmlib.h symtab.h collectn.h rdlib.h
spotless: clean symtab.o: symtab.c symtab.h
rm -f Makefile collectn.o: collectn.c collectn.h
rdx.o: rdx.c rdoff.h rdfload.h symtab.h
distclean: spotless rdfload.o: rdfload.c rdfload.h rdoff.h collectn.h symtab.h
rdlib.o: rdlib.c rdlib.h
- install: rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdflib.o: rdflib.c
$(INSTALL_PROGRAM) rdfdump $(INSTALLROOT)$(bindir)/rdfdump segtab.o: segtab.c
$(INSTALL_PROGRAM) ldrdf $(INSTALLROOT)$(bindir)/ldrdf
$(INSTALL_PROGRAM) rdx $(INSTALLROOT)$(bindir)/rdx nasmlib.o: $(top_srcdir)/nasmlib.c
$(INSTALL_PROGRAM) rdflib $(INSTALLROOT)$(bindir)/rdflib ## $(CC) -c $(CFLAGS) $(top_srcdir)/nasmlib.c
$(INSTALL_PROGRAM) rdf2bin $(INSTALLROOT)$(bindir)/rdf2bin cd $(top_srcdir);make nasmlib.o
cd $(INSTALLROOT)$(bindir) && rm -f rdf2com && $(LN_S) rdf2bin rdf2com cp $(top_srcdir)/nasmlib.o $(srcdir)
--- 65,82 ----
$(CC) -c $(CFLAGS) $(top_srcdir)/nasmlib.c clean:
rm -f *.o rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx
clean:
+ rm -f *.o rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx spotless: clean
rm -f Makefile
spotless: clean
rm -f Makefile distclean: spotless
distclean: spotless install: rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx
$(INSTALL_PROGRAM) rdfdump $(INSTALLROOT)$(bindir)/rdfdump
+ install: rdfdump ldrdf rdx rdflib rdf2bin rdf2com rdf2ihx $(INSTALL_PROGRAM) ldrdf $(INSTALLROOT)$(bindir)/ldrdf
$(INSTALL_PROGRAM) rdfdump $(INSTALLROOT)$(bindir)/rdfdump $(INSTALL_PROGRAM) rdx $(INSTALLROOT)$(bindir)/rdx
$(INSTALL_PROGRAM) ldrdf $(INSTALLROOT)$(bindir)/ldrdf $(INSTALL_PROGRAM) rdflib $(INSTALLROOT)$(bindir)/rdflib
$(INSTALL_PROGRAM) rdx $(INSTALLROOT)$(bindir)/rdx $(INSTALL_PROGRAM) rdf2bin $(INSTALLROOT)$(bindir)/rdf2bin
$(INSTALL_PROGRAM) rdflib $(INSTALLROOT)$(bindir)/rdflib $(INSTALL_PROGRAM) rdf2ihx $(INSTALLROOT)$(bindir)/rdf2ihx
$(INSTALL_PROGRAM) rdf2bin $(INSTALLROOT)$(bindir)/rdf2bin cd $(INSTALLROOT)$(bindir) && rm -f rdf2com && $(LN_S) rdf2bin rdf2com
+ $(INSTALL_PROGRAM) rdf2ihx $(INSTALLROOT)$(bindir)/rdf2ihx
cd $(INSTALLROOT)$(bindir) && rm -f rdf2com && $(LN_S) rdf2bin rdf2com

1378
rdoff/ldrdf.c
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File diff suppressed because it is too large Load Diff

90
test/bintest.asm
View File

@@ -1,34 +1,56 @@
*************** ; test source file for assembling to binary files
*** 26,32 **** ; build with:
; nasm -f bin -o bintest.com bintest.asm
jmp start ; [6]
; When run (as a DOS .COM file), this program should print
- end mov ax,0x4c00 ; [1] ; hello, world
int 0x21 ; on two successive lines, then exit cleanly.
start mov byte [bss_sym],',' ; [1] [8] ; This file should test the following:
--- 26,32 ---- ; [1] Define a text-section symbol
; [2] Define a data-section symbol
jmp start ; [6] ; [3] Define a BSS-section symbol
; [4] Define a NASM local label
+ endX mov ax,0x4c00 ; [1] ; [5] Reference a NASM local label
int 0x21 ; [6] Reference a text-section symbol in the text section
; [7] Reference a data-section symbol in the text section
start mov byte [bss_sym],',' ; [1] [8] ; [8] Reference a BSS-section symbol in the text section
*************** ; [9] Reference a text-section symbol in the data section
*** 49,55 **** ; [10] Reference a data-section symbol in the data section
datasym db 'hello world', 13, 10, '$' ; [2] ; [11] Reference a BSS-section symbol in the data section
bssptr dw bss_sym ; [2] [11]
dataptr dw datasym+5 ; [2] [10] BITS 16
- textptr dw end ; [2] [9] ORG 0x100
SECTION .bss SECTION .text
--- 49,55 ---- jmp start ; [6]
datasym db 'hello world', 13, 10, '$' ; [2]
bssptr dw bss_sym ; [2] [11] endX mov ax,0x4c00 ; [1]
dataptr dw datasym+5 ; [2] [10] int 0x21
+ textptr dw endX ; [2] [9]
start mov byte [bss_sym],',' ; [1] [8]
SECTION .bss mov bx,[bssptr] ; [7]
mov al,[bx]
mov bx,[dataptr] ; [7]
mov [bx],al
mov cx,2
.loop mov dx,datasym ; [1] [4] [7]
mov ah,9
push cx
int 0x21
pop cx
loop .loop ; [5] [6]
mov bx,[textptr] ; [7]
jmp bx
SECTION .data
datasym db 'hello world', 13, 10, '$' ; [2]
bssptr dw bss_sym ; [2] [11]
dataptr dw datasym+5 ; [2] [10]
textptr dw endX ; [2] [9]
SECTION .bss
bss_sym resb 1 ; [3]