aniani/nasm
0
0
Fork 1
mirror of https://github.com/netwide-assembler/nasm.git synced 2025-09-22 10:43:39 -04:00
Code Activity

disasm: Add suport for bnd registers

Browse Source 
MPX uses a new bnd registers and a new mib syntax.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>
This commit is contained in:
Jin Kyu Song
2013-11-19 18:44:13 -08:00
parent 5f80dace3a
commit 28d5bf811b
1 changed files with 7 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
disasm.c
View File

@@ -192,6 +192,8 @@ static enum reg_enum whichreg(opflags_t regflags, int regval, int rex)
return nasm_rd_zmmreg[regval]; return nasm_rd_zmmreg[regval];
if (!(OPMASKREG & ~regflags)) if (!(OPMASKREG & ~regflags))
return nasm_rd_opmaskreg[regval]; return nasm_rd_opmaskreg[regval];
if (!(BNDREG & ~regflags))
return nasm_rd_bndreg[regval];
return 0; return 0;
} }
@@ -614,6 +616,11 @@ static int matches(const struct itemplate *t, uint8_t *data,
break; break;
} }
case4(014):
/* this is an separate index reg position of MIB operand (ICC) */
/* Disassembler uses NASM's split EA form only */
break;
case4(0274): case4(0274):
opx->offset = (int8_t)*data++; opx->offset = (int8_t)*data++;
opx->segment |= SEG_SIGNED; opx->segment |= SEG_SIGNED;